|
@@ -1,168 +0,0 @@
|
|
|
-From a864a5b3efe9dce1647172d105559a1b850cf4c9 Mon Sep 17 00:00:00 2001
|
|
|
-From: Florian Fainelli <[email protected]>
|
|
|
-Date: Tue, 14 Jan 2014 15:29:25 -0800
|
|
|
-Subject: [PATCH] usb: gadget: bcm63xx_udc: fix build failure on DMA channel
|
|
|
- code
|
|
|
-
|
|
|
-Commit 3dc6475 ("bcm63xx_enet: add support Broadcom BCM6345 Ethernet")
|
|
|
-changed the ENETDMA[CS] macros such that they are no longer macros, but
|
|
|
-actual register offset definitions. The bcm63xx_udc driver was not
|
|
|
-updated, and as a result, causes the following build error to pop up:
|
|
|
-
|
|
|
- CC drivers/usb/gadget/u_ether.o
|
|
|
-drivers/usb/gadget/bcm63xx_udc.c: In function 'iudma_write':
|
|
|
-drivers/usb/gadget/bcm63xx_udc.c:642:24: error: called object '0' is not
|
|
|
-a function
|
|
|
-drivers/usb/gadget/bcm63xx_udc.c: In function 'iudma_reset_channel':
|
|
|
-drivers/usb/gadget/bcm63xx_udc.c:698:46: error: called object '0' is not
|
|
|
-a function
|
|
|
-drivers/usb/gadget/bcm63xx_udc.c:700:49: error: called object '0' is not
|
|
|
-a function
|
|
|
-
|
|
|
-Fix this by updating usb_dmac_{read,write}l and usb_dmas_{read,write}l to
|
|
|
-take an extra channel argument, and use the channel width
|
|
|
-(ENETDMA_CHAN_WIDTH) to offset the register we want to access, hence
|
|
|
-doing again what the macro implicitely did for us.
|
|
|
-
|
|
|
-CC: Kevin Cernekee <[email protected]>
|
|
|
-CC: Jonas Gorski <[email protected]>
|
|
|
-CC: [email protected]
|
|
|
-Signed-off-by: Florian Fainelli <[email protected]>
|
|
|
----
|
|
|
-Felipe,
|
|
|
-
|
|
|
-This is against your branch as balbi/usb.git, and this fix should be applied to
|
|
|
-stable 3.11 onwards.
|
|
|
-
|
|
|
-Thanks!
|
|
|
-
|
|
|
- drivers/usb/gadget/bcm63xx_udc.c | 58 ++++++++++++++++++++++------------------
|
|
|
- 1 file changed, 32 insertions(+), 26 deletions(-)
|
|
|
-
|
|
|
---- a/drivers/usb/gadget/bcm63xx_udc.c
|
|
|
-+++ b/drivers/usb/gadget/bcm63xx_udc.c
|
|
|
-@@ -362,24 +362,30 @@ static inline void usb_dma_writel(struct
|
|
|
- bcm_writel(val, udc->iudma_regs + off);
|
|
|
- }
|
|
|
-
|
|
|
--static inline u32 usb_dmac_readl(struct bcm63xx_udc *udc, u32 off)
|
|
|
-+static inline u32 usb_dmac_readl(struct bcm63xx_udc *udc, u32 off, int chan)
|
|
|
- {
|
|
|
-- return bcm_readl(udc->iudma_regs + IUDMA_DMAC_OFFSET + off);
|
|
|
-+ return bcm_readl(udc->iudma_regs + IUDMA_DMAC_OFFSET + off +
|
|
|
-+ (ENETDMA_CHAN_WIDTH * chan));
|
|
|
- }
|
|
|
-
|
|
|
--static inline void usb_dmac_writel(struct bcm63xx_udc *udc, u32 val, u32 off)
|
|
|
-+static inline void usb_dmac_writel(struct bcm63xx_udc *udc, u32 val, u32 off,
|
|
|
-+ int chan)
|
|
|
- {
|
|
|
-- bcm_writel(val, udc->iudma_regs + IUDMA_DMAC_OFFSET + off);
|
|
|
-+ bcm_writel(val, udc->iudma_regs + IUDMA_DMAC_OFFSET + off +
|
|
|
-+ (ENETDMA_CHAN_WIDTH * chan));
|
|
|
- }
|
|
|
-
|
|
|
--static inline u32 usb_dmas_readl(struct bcm63xx_udc *udc, u32 off)
|
|
|
-+static inline u32 usb_dmas_readl(struct bcm63xx_udc *udc, u32 off, int chan)
|
|
|
- {
|
|
|
-- return bcm_readl(udc->iudma_regs + IUDMA_DMAS_OFFSET + off);
|
|
|
-+ return bcm_readl(udc->iudma_regs + IUDMA_DMAS_OFFSET + off +
|
|
|
-+ (ENETDMA_CHAN_WIDTH * chan));
|
|
|
- }
|
|
|
-
|
|
|
--static inline void usb_dmas_writel(struct bcm63xx_udc *udc, u32 val, u32 off)
|
|
|
-+static inline void usb_dmas_writel(struct bcm63xx_udc *udc, u32 val, u32 off,
|
|
|
-+ int chan)
|
|
|
- {
|
|
|
-- bcm_writel(val, udc->iudma_regs + IUDMA_DMAS_OFFSET + off);
|
|
|
-+ bcm_writel(val, udc->iudma_regs + IUDMA_DMAS_OFFSET + off +
|
|
|
-+ (ENETDMA_CHAN_WIDTH * chan));
|
|
|
- }
|
|
|
-
|
|
|
- static inline void set_clocks(struct bcm63xx_udc *udc, bool is_enabled)
|
|
|
-@@ -639,7 +645,7 @@ static void iudma_write(struct bcm63xx_u
|
|
|
- } while (!last_bd);
|
|
|
-
|
|
|
- usb_dmac_writel(udc, ENETDMAC_CHANCFG_EN_MASK,
|
|
|
-- ENETDMAC_CHANCFG_REG(iudma->ch_idx));
|
|
|
-+ ENETDMAC_CHANCFG_REG, iudma->ch_idx);
|
|
|
- }
|
|
|
-
|
|
|
- /**
|
|
|
-@@ -695,9 +701,9 @@ static void iudma_reset_channel(struct b
|
|
|
- bcm63xx_fifo_reset_ep(udc, max(0, iudma->ep_num));
|
|
|
-
|
|
|
- /* stop DMA, then wait for the hardware to wrap up */
|
|
|
-- usb_dmac_writel(udc, 0, ENETDMAC_CHANCFG_REG(ch_idx));
|
|
|
-+ usb_dmac_writel(udc, 0, ENETDMAC_CHANCFG_REG, ch_idx);
|
|
|
-
|
|
|
-- while (usb_dmac_readl(udc, ENETDMAC_CHANCFG_REG(ch_idx)) &
|
|
|
-+ while (usb_dmac_readl(udc, ENETDMAC_CHANCFG_REG, ch_idx) &
|
|
|
- ENETDMAC_CHANCFG_EN_MASK) {
|
|
|
- udelay(1);
|
|
|
-
|
|
|
-@@ -714,10 +720,10 @@ static void iudma_reset_channel(struct b
|
|
|
- dev_warn(udc->dev, "forcibly halting IUDMA channel %d\n",
|
|
|
- ch_idx);
|
|
|
- usb_dmac_writel(udc, ENETDMAC_CHANCFG_BUFHALT_MASK,
|
|
|
-- ENETDMAC_CHANCFG_REG(ch_idx));
|
|
|
-+ ENETDMAC_CHANCFG_REG, ch_idx);
|
|
|
- }
|
|
|
- }
|
|
|
-- usb_dmac_writel(udc, ~0, ENETDMAC_IR_REG(ch_idx));
|
|
|
-+ usb_dmac_writel(udc, ~0, ENETDMAC_IR_REG, ch_idx);
|
|
|
-
|
|
|
- /* don't leave "live" HW-owned entries for the next guy to step on */
|
|
|
- for (d = iudma->bd_ring; d <= iudma->end_bd; d++)
|
|
|
-@@ -729,11 +735,11 @@ static void iudma_reset_channel(struct b
|
|
|
-
|
|
|
- /* set up IRQs, UBUS burst size, and BD base for this channel */
|
|
|
- usb_dmac_writel(udc, ENETDMAC_IR_BUFDONE_MASK,
|
|
|
-- ENETDMAC_IRMASK_REG(ch_idx));
|
|
|
-- usb_dmac_writel(udc, 8, ENETDMAC_MAXBURST_REG(ch_idx));
|
|
|
-+ ENETDMAC_IRMASK_REG, ch_idx);
|
|
|
-+ usb_dmac_writel(udc, 8, ENETDMAC_MAXBURST_REG, ch_idx);
|
|
|
-
|
|
|
-- usb_dmas_writel(udc, iudma->bd_ring_dma, ENETDMAS_RSTART_REG(ch_idx));
|
|
|
-- usb_dmas_writel(udc, 0, ENETDMAS_SRAM2_REG(ch_idx));
|
|
|
-+ usb_dmas_writel(udc, iudma->bd_ring_dma, ENETDMAS_RSTART_REG, ch_idx);
|
|
|
-+ usb_dmas_writel(udc, 0, ENETDMAS_SRAM2_REG, ch_idx);
|
|
|
- }
|
|
|
-
|
|
|
- /**
|
|
|
-@@ -2016,7 +2022,7 @@ static irqreturn_t bcm63xx_udc_data_isr(
|
|
|
- spin_lock(&udc->lock);
|
|
|
-
|
|
|
- usb_dmac_writel(udc, ENETDMAC_IR_BUFDONE_MASK,
|
|
|
-- ENETDMAC_IR_REG(iudma->ch_idx));
|
|
|
-+ ENETDMAC_IR_REG, iudma->ch_idx);
|
|
|
- bep = iudma->bep;
|
|
|
- rc = iudma_read(udc, iudma);
|
|
|
-
|
|
|
-@@ -2156,18 +2162,18 @@ static int bcm63xx_iudma_dbg_show(struct
|
|
|
- seq_printf(s, " [ep%d]:\n",
|
|
|
- max_t(int, iudma_defaults[ch_idx].ep_num, 0));
|
|
|
- seq_printf(s, " cfg: %08x; irqstat: %08x; irqmask: %08x; maxburst: %08x\n",
|
|
|
-- usb_dmac_readl(udc, ENETDMAC_CHANCFG_REG(ch_idx)),
|
|
|
-- usb_dmac_readl(udc, ENETDMAC_IR_REG(ch_idx)),
|
|
|
-- usb_dmac_readl(udc, ENETDMAC_IRMASK_REG(ch_idx)),
|
|
|
-- usb_dmac_readl(udc, ENETDMAC_MAXBURST_REG(ch_idx)));
|
|
|
-+ usb_dmac_readl(udc, ENETDMAC_CHANCFG_REG, ch_idx),
|
|
|
-+ usb_dmac_readl(udc, ENETDMAC_IR_REG, ch_idx),
|
|
|
-+ usb_dmac_readl(udc, ENETDMAC_IRMASK_REG, ch_idx),
|
|
|
-+ usb_dmac_readl(udc, ENETDMAC_MAXBURST_REG, ch_idx));
|
|
|
-
|
|
|
-- sram2 = usb_dmas_readl(udc, ENETDMAS_SRAM2_REG(ch_idx));
|
|
|
-- sram3 = usb_dmas_readl(udc, ENETDMAS_SRAM3_REG(ch_idx));
|
|
|
-+ sram2 = usb_dmas_readl(udc, ENETDMAS_SRAM2_REG, ch_idx);
|
|
|
-+ sram3 = usb_dmas_readl(udc, ENETDMAS_SRAM3_REG, ch_idx);
|
|
|
- seq_printf(s, " base: %08x; index: %04x_%04x; desc: %04x_%04x %08x\n",
|
|
|
-- usb_dmas_readl(udc, ENETDMAS_RSTART_REG(ch_idx)),
|
|
|
-+ usb_dmas_readl(udc, ENETDMAS_RSTART_REG, ch_idx),
|
|
|
- sram2 >> 16, sram2 & 0xffff,
|
|
|
- sram3 >> 16, sram3 & 0xffff,
|
|
|
-- usb_dmas_readl(udc, ENETDMAS_SRAM4_REG(ch_idx)));
|
|
|
-+ usb_dmas_readl(udc, ENETDMAS_SRAM4_REG, ch_idx));
|
|
|
- seq_printf(s, " desc: %d/%d used", iudma->n_bds_used,
|
|
|
- iudma->n_bds);
|
|
|
-
|