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@@ -0,0 +1,84 @@
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+From f11a04464ae57e8db1bb7634547842b43e36a898 Mon Sep 17 00:00:00 2001
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+From: =?UTF-8?q?Jan=20Kundr=C3=A1t?= <[email protected]>
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+Date: Fri, 22 Dec 2017 22:47:16 +0100
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+Subject: i2c: gpio: Enable working over slow can_sleep GPIOs
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+MIME-Version: 1.0
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+Content-Type: text/plain; charset=UTF-8
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+Content-Transfer-Encoding: 8bit
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+
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+"Slow" GPIOs (usually those connected over an SPI or an I2C bus) are,
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+well, slow in their operation. It is generally a good idea to avoid
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+using them for time-critical operation, but sometimes the hardware just
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+sucks, and the software has to cope. In addition to that, the I2C bus
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+itself does not actually define any strict timing limits; the bus is
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+free to go all the way down to DC. The timeouts (and therefore the
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+slowest acceptable frequency) are present only in SMBus.
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+
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+The `can_sleep` is IMHO a wrong concept to use here. My SPI-to-quad-UART
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+chip (MAX14830) is connected via a 26MHz SPI bus, and it happily drives
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+SCL at 200kHz (5µs pulses) during my benchmarks. That's faster than the
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+maximal allowed speed of the traditional I2C.
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+
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+The previous version of this code did not really block operation over
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+slow GPIO pins, anyway. Instead, it just resorted to printing a warning
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+with a backtrace each time a GPIO pin was accessed, thereby slowing
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+things down even more.
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+
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+Finally, it's not just me. A similar patch was originally submitted in
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+2015 [1].
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+
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+[1] https://patchwork.ozlabs.org/patch/450956/
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+
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+Signed-off-by: Jan Kundrát <[email protected]>
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+Acked-by: Uwe Kleine-König <[email protected]>
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+Signed-off-by: Wolfram Sang <[email protected]>
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+---
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+ drivers/i2c/busses/i2c-gpio.c | 11 +++++++----
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+ 1 file changed, 7 insertions(+), 4 deletions(-)
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+
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+--- a/drivers/i2c/busses/i2c-gpio.c
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++++ b/drivers/i2c/busses/i2c-gpio.c
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+@@ -44,7 +44,7 @@ static void i2c_gpio_setsda_val(void *da
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+ {
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+ struct i2c_gpio_platform_data *pdata = data;
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+
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+- gpio_set_value(pdata->sda_pin, state);
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++ gpio_set_value_cansleep(pdata->sda_pin, state);
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+ }
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+
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+ /* Toggle SCL by changing the direction of the pin. */
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+@@ -68,21 +68,21 @@ static void i2c_gpio_setscl_val(void *da
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+ {
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+ struct i2c_gpio_platform_data *pdata = data;
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+
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+- gpio_set_value(pdata->scl_pin, state);
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++ gpio_set_value_cansleep(pdata->scl_pin, state);
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+ }
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+
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+ static int i2c_gpio_getsda(void *data)
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+ {
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+ struct i2c_gpio_platform_data *pdata = data;
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+
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+- return gpio_get_value(pdata->sda_pin);
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++ return gpio_get_value_cansleep(pdata->sda_pin);
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+ }
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+
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+ static int i2c_gpio_getscl(void *data)
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+ {
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+ struct i2c_gpio_platform_data *pdata = data;
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+
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+- return gpio_get_value(pdata->scl_pin);
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++ return gpio_get_value_cansleep(pdata->scl_pin);
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+ }
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+
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+ static int of_i2c_gpio_get_pins(struct device_node *np,
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+@@ -175,6 +175,9 @@ static int i2c_gpio_probe(struct platfor
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+ memcpy(pdata, dev_get_platdata(&pdev->dev), sizeof(*pdata));
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+ }
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+
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++ if (gpiod_cansleep(gpio_to_desc(pdata->sda_pin)) || gpiod_cansleep(gpio_to_desc(pdata->scl_pin)))
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++ dev_warn(&pdev->dev, "Slow GPIO pins might wreak havoc into I2C/SMBus bus timing");
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++
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+ if (pdata->sda_is_open_drain) {
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+ gpio_direction_output(pdata->sda_pin, 1);
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+ bit_data->setsda = i2c_gpio_setsda_val;
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