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@@ -0,0 +1,84 @@
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+From 3e4c3863e0cfb8c2abdff6bb494ca69d3d2aed9c Mon Sep 17 00:00:00 2001
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+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <[email protected]>
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+Date: Sat, 10 Jun 2023 17:01:40 +0200
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+Subject: [PATCH] mips: bmips: dma: fix CBR address
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+MIME-Version: 1.0
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+Content-Type: text/plain; charset=UTF-8
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+Content-Transfer-Encoding: 8bit
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+
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+Some BCM63xx SoCs may return CBR address as 0.
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+
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+Signed-off-by: Álvaro Fernández Rojas <[email protected]>
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+---
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+ arch/mips/bmips/dma.c | 12 ++++--------
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+ arch/mips/bmips/setup.c | 11 ++++-------
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+ 2 files changed, 8 insertions(+), 15 deletions(-)
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+
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+--- a/arch/mips/bmips/dma.c
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++++ b/arch/mips/bmips/dma.c
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+@@ -64,11 +64,10 @@ phys_addr_t dma_to_phys(struct device *d
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+ return dma_addr;
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+ }
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+
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+-bool bmips_rac_flush_disable;
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++void __iomem *bmips_cbr_addr;
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+
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+ void arch_sync_dma_for_cpu_all(void)
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+ {
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+- void __iomem *cbr = BMIPS_GET_CBR();
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+ u32 cfg;
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+
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+ if (boot_cpu_type() != CPU_BMIPS3300 &&
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+@@ -76,13 +75,10 @@ void arch_sync_dma_for_cpu_all(void)
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+ boot_cpu_type() != CPU_BMIPS4380)
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+ return;
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+
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+- if (unlikely(bmips_rac_flush_disable))
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+- return;
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+-
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+ /* Flush stale data out of the readahead cache */
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+- cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG);
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+- __raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG);
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+- __raw_readl(cbr + BMIPS_RAC_CONFIG);
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++ cfg = __raw_readl(bmips_cbr_addr + BMIPS_RAC_CONFIG);
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++ __raw_writel(cfg | 0x100, bmips_cbr_addr + BMIPS_RAC_CONFIG);
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++ __raw_readl(bmips_cbr_addr + BMIPS_RAC_CONFIG);
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+ }
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+
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+ static int __init bmips_init_dma_ranges(void)
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+--- a/arch/mips/bmips/setup.c
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++++ b/arch/mips/bmips/setup.c
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+@@ -89,7 +89,7 @@
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+
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+ #define DDR_CSEND_REG 0x8
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+
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+-extern bool bmips_rac_flush_disable;
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++extern void __iomem *bmips_cbr_addr;
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+
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+ static const unsigned long kbase = VMLINUX_LOAD_ADDRESS & 0xfff00000;
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+
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+@@ -170,12 +170,6 @@ static void bcm6358_quirks(void)
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+ * disable SMP for now
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+ */
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+ bmips_smp_enabled = 0;
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+-
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+- /*
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+- * RAC flush causes kernel panics on BCM6358 when booting from TP1
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+- * because the bootloader is not initializing it properly.
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+- */
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+- bmips_rac_flush_disable = !!(read_c0_brcm_cmt_local() & (1 << 31));
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+ }
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+
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+ static void bcm6368_quirks(void)
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+@@ -198,6 +192,11 @@ static const struct bmips_quirk bmips_qu
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+
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+ void __init prom_init(void)
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+ {
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++ if (!(read_c0_brcm_cbr() >> 18))
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++ bmips_cbr_addr = (void __iomem *)0xff400000;
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++ else
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++ bmips_cbr_addr = BMIPS_GET_CBR();
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++
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+ bmips_cpu_setup();
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+ register_bmips_smp_ops();
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+ }
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