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@@ -0,0 +1,51 @@
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+From 4cc30de79d293f1e8c5f50ae3a9c005def9564a0 Mon Sep 17 00:00:00 2001
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+From: Koen Vandeputte <[email protected]>
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+Date: Mon, 7 Jan 2019 14:14:27 +0100
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+Subject: [PATCH 2/2] arm: cns3xxx: use actual size reads for PCIe
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+
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+commit 802b7c06adc7 ("ARM: cns3xxx: Convert PCI to use generic config accessors")
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+reimplemented cns3xxx_pci_read_config() using pci_generic_config_read32(),
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+which preserved the property of only doing 32-bit reads.
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+
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+It also replaced cns3xxx_pci_write_config() with pci_generic_config_write(),
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+so it changed writes from always being 32 bits to being the actual size,
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+which works just fine.
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+
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+Due to:
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+- The documentation does not mention that only 32 bit access is allowed.
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+- Writes are already executed using the actual size
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+- Extensive testing shows that 8b, 16b and 32b reads work as intended
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+
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+It makes perfectly sense to also swap 32 bit reading in favor of actual size.
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+
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+Fixes: 802b7c06adc7 ("ARM: cns3xxx: Convert PCI to use generic config accessors")
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+Suggested-by: Bjorn Helgaas <[email protected]>
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+Signed-off-by: Koen Vandeputte <[email protected]>
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+CC: Arnd Bergmann <[email protected]>
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+CC: Krzysztof Halasa <[email protected]>
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+CC: Olof Johansson <[email protected]>
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+CC: Robin Leblon <[email protected]>
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+CC: Rob Herring <[email protected]>
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+CC: Russell King <[email protected]>
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+CC: Tim Harvey <[email protected]>
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+CC: [email protected] # v4.0+
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+---
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+ arch/arm/mach-cns3xxx/pcie.c | 2 +-
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+ 1 file changed, 1 insertion(+), 1 deletion(-)
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+
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+diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c
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+index 5e11ad3164e0..95a11d5b3587 100644
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+--- a/arch/arm/mach-cns3xxx/pcie.c
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++++ b/arch/arm/mach-cns3xxx/pcie.c
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+@@ -93,7 +93,7 @@ static int cns3xxx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
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+ u32 mask = (0x1ull << (size * 8)) - 1;
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+ int shift = (where % 4) * 8;
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+
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+- ret = pci_generic_config_read32(bus, devfn, where, size, val);
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++ ret = pci_generic_config_read(bus, devfn, where, size, val);
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+
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+ if (ret == PCIBIOS_SUCCESSFUL && !bus->number && !devfn &&
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+ (where & 0xffc) == PCI_CLASS_REVISION)
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+--
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+2.17.1
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+
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