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@@ -0,0 +1,176 @@
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+From: Robin Murphy <[email protected]>
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+Date: Wed, 15 Jan 2020 16:42:39 +0000
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+Subject: [PATCH] arm64: Implement optimised checksum routine
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+
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+Apparently there exist certain workloads which rely heavily on software
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+checksumming, for which the generic do_csum() implementation becomes a
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+significant bottleneck. Therefore let's give arm64 its own optimised
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+version - for ease of maintenance this foregoes assembly or intrisics,
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+and is thus not actually arm64-specific, but does rely heavily on C
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+idioms that translate well to the A64 ISA and the typical load/store
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+capabilities of most ARMv8 CPU cores.
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+
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+The resulting increase in checksum throughput scales nicely with buffer
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+size, tending towards 4x for a small in-order core (Cortex-A53), and up
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+to 6x or more for an aggressive big core (Ampere eMAG).
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+
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+Reported-by: Lingyan Huang <[email protected]>
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+Tested-by: Lingyan Huang <[email protected]>
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+Signed-off-by: Robin Murphy <[email protected]>
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+Signed-off-by: Will Deacon <[email protected]>
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+---
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+ create mode 100644 arch/arm64/lib/csum.c
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+
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+--- a/arch/arm64/include/asm/checksum.h
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++++ b/arch/arm64/include/asm/checksum.h
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+@@ -36,6 +36,9 @@ static inline __sum16 ip_fast_csum(const
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+ }
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+ #define ip_fast_csum ip_fast_csum
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+
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++extern unsigned int do_csum(const unsigned char *buff, int len);
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++#define do_csum do_csum
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++
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+ #include <asm-generic/checksum.h>
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+
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+ #endif /* __ASM_CHECKSUM_H */
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+--- a/arch/arm64/lib/Makefile
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++++ b/arch/arm64/lib/Makefile
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+@@ -1,9 +1,9 @@
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+ # SPDX-License-Identifier: GPL-2.0
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+ lib-y := clear_user.o delay.o copy_from_user.o \
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+ copy_to_user.o copy_in_user.o copy_page.o \
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+- clear_page.o memchr.o memcpy.o memmove.o memset.o \
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+- memcmp.o strcmp.o strncmp.o strlen.o strnlen.o \
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+- strchr.o strrchr.o tishift.o
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++ clear_page.o csum.o memchr.o memcpy.o memmove.o \
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++ memset.o memcmp.o strcmp.o strncmp.o strlen.o \
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++ strnlen.o strchr.o strrchr.o tishift.o
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+
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+ ifeq ($(CONFIG_KERNEL_MODE_NEON), y)
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+ obj-$(CONFIG_XOR_BLOCKS) += xor-neon.o
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+--- /dev/null
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++++ b/arch/arm64/lib/csum.c
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+@@ -0,0 +1,123 @@
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++// SPDX-License-Identifier: GPL-2.0-only
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++// Copyright (C) 2019-2020 Arm Ltd.
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++
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++#include <linux/compiler.h>
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++#include <linux/kasan-checks.h>
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++#include <linux/kernel.h>
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++
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++#include <net/checksum.h>
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++
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++/* Looks dumb, but generates nice-ish code */
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++static u64 accumulate(u64 sum, u64 data)
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++{
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++ __uint128_t tmp = (__uint128_t)sum + data;
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++ return tmp + (tmp >> 64);
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++}
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++
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++unsigned int do_csum(const unsigned char *buff, int len)
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++{
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++ unsigned int offset, shift, sum;
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++ const u64 *ptr;
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++ u64 data, sum64 = 0;
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++
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++ offset = (unsigned long)buff & 7;
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++ /*
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++ * This is to all intents and purposes safe, since rounding down cannot
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++ * result in a different page or cache line being accessed, and @buff
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++ * should absolutely not be pointing to anything read-sensitive. We do,
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++ * however, have to be careful not to piss off KASAN, which means using
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++ * unchecked reads to accommodate the head and tail, for which we'll
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++ * compensate with an explicit check up-front.
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++ */
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++ kasan_check_read(buff, len);
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++ ptr = (u64 *)(buff - offset);
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++ len = len + offset - 8;
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++
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++ /*
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++ * Head: zero out any excess leading bytes. Shifting back by the same
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++ * amount should be at least as fast as any other way of handling the
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++ * odd/even alignment, and means we can ignore it until the very end.
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++ */
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++ shift = offset * 8;
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++ data = READ_ONCE_NOCHECK(*ptr++);
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++#ifdef __LITTLE_ENDIAN
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++ data = (data >> shift) << shift;
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++#else
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++ data = (data << shift) >> shift;
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++#endif
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++
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++ /*
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++ * Body: straightforward aligned loads from here on (the paired loads
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++ * underlying the quadword type still only need dword alignment). The
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++ * main loop strictly excludes the tail, so the second loop will always
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++ * run at least once.
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++ */
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++ while (unlikely(len > 64)) {
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++ __uint128_t tmp1, tmp2, tmp3, tmp4;
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++
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++ tmp1 = READ_ONCE_NOCHECK(*(__uint128_t *)ptr);
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++ tmp2 = READ_ONCE_NOCHECK(*(__uint128_t *)(ptr + 2));
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++ tmp3 = READ_ONCE_NOCHECK(*(__uint128_t *)(ptr + 4));
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++ tmp4 = READ_ONCE_NOCHECK(*(__uint128_t *)(ptr + 6));
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++
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++ len -= 64;
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++ ptr += 8;
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++
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++ /* This is the "don't dump the carry flag into a GPR" idiom */
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++ tmp1 += (tmp1 >> 64) | (tmp1 << 64);
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++ tmp2 += (tmp2 >> 64) | (tmp2 << 64);
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++ tmp3 += (tmp3 >> 64) | (tmp3 << 64);
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++ tmp4 += (tmp4 >> 64) | (tmp4 << 64);
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++ tmp1 = ((tmp1 >> 64) << 64) | (tmp2 >> 64);
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++ tmp1 += (tmp1 >> 64) | (tmp1 << 64);
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++ tmp3 = ((tmp3 >> 64) << 64) | (tmp4 >> 64);
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++ tmp3 += (tmp3 >> 64) | (tmp3 << 64);
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++ tmp1 = ((tmp1 >> 64) << 64) | (tmp3 >> 64);
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++ tmp1 += (tmp1 >> 64) | (tmp1 << 64);
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++ tmp1 = ((tmp1 >> 64) << 64) | sum64;
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++ tmp1 += (tmp1 >> 64) | (tmp1 << 64);
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++ sum64 = tmp1 >> 64;
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++ }
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++ while (len > 8) {
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++ __uint128_t tmp;
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++
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++ sum64 = accumulate(sum64, data);
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++ tmp = READ_ONCE_NOCHECK(*(__uint128_t *)ptr);
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++
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++ len -= 16;
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++ ptr += 2;
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++
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++#ifdef __LITTLE_ENDIAN
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++ data = tmp >> 64;
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++ sum64 = accumulate(sum64, tmp);
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++#else
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++ data = tmp;
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++ sum64 = accumulate(sum64, tmp >> 64);
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++#endif
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++ }
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++ if (len > 0) {
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++ sum64 = accumulate(sum64, data);
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++ data = READ_ONCE_NOCHECK(*ptr);
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++ len -= 8;
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++ }
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++ /*
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++ * Tail: zero any over-read bytes similarly to the head, again
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++ * preserving odd/even alignment.
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++ */
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++ shift = len * -8;
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++#ifdef __LITTLE_ENDIAN
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++ data = (data << shift) >> shift;
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++#else
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++ data = (data >> shift) << shift;
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++#endif
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++ sum64 = accumulate(sum64, data);
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++
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++ /* Finally, folding */
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++ sum64 += (sum64 >> 32) | (sum64 << 32);
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++ sum = sum64 >> 32;
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++ sum += (sum >> 16) | (sum << 16);
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++ if (offset & 1)
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++ return (u16)swab32(sum);
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++
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++ return sum >> 16;
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++}
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