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@@ -1554,7 +1554,7 @@ static void rtl931x_set_distribution_algorithm(int group, int algoidx, u32 algom
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sw_w32(newmask << l3shift, RTL931X_TRK_HASH_CTRL + (algoidx << 2));
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}
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-static void rtl931x_led_init(struct rtl838x_switch_priv *priv)
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+static void rtldsa_931x_led_init(struct rtl838x_switch_priv *priv)
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{
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u64 pm_copper = 0, pm_fiber = 0;
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struct device_node *node;
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@@ -1569,7 +1569,6 @@ static void rtl931x_led_init(struct rtl838x_switch_priv *priv)
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for (int i = 0; i < priv->cpu_port; i++) {
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int pos = (i << 1) % 32;
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u32 set;
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- u32 v;
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sw_w32_mask(0x3 << pos, 0, RTL931X_LED_PORT_FIB_SET_SEL_CTRL(i));
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sw_w32_mask(0x3 << pos, 0, RTL931X_LED_PORT_COPR_SET_SEL_CTRL(i));
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@@ -1577,8 +1576,9 @@ static void rtl931x_led_init(struct rtl838x_switch_priv *priv)
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if (!priv->ports[i].phy)
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continue;
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- v = 0x1; /* Found on the EdgeCore, but we do not have any HW description */
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- sw_w32_mask(0x3 << pos, v << pos, RTL931X_LED_PORT_NUM_CTRL(i));
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+ /* 0x0 = 1 led, 0x1 = 2 leds, 0x2 = 3 leds, 0x3 = 4 leds per port */
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+ sw_w32_mask(0x3 << pos, (priv->ports[i].leds_on_this_port - 1) << pos,
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+ RTL931X_LED_PORT_NUM_CTRL(i));
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if (priv->ports[i].phy_is_integrated)
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pm_fiber |= BIT_ULL(i);
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@@ -1686,5 +1686,5 @@ const struct rtl838x_reg rtl931x_reg = {
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.pie_rule_rm = rtl931x_pie_rule_rm,
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.l2_learning_setup = rtl931x_l2_learning_setup,
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.l3_setup = rtl931x_l3_setup,
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- .led_init = rtl931x_led_init,
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+ .led_init = rtldsa_931x_led_init,
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};
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