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@@ -0,0 +1,831 @@
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+From 71bd508d7ded8c504ef05d1b4befecfe25e54cb1 Mon Sep 17 00:00:00 2001
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+From: Ian Molton <[email protected]>
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+Date: Fri, 8 Dec 2017 13:10:29 +0100
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+Subject: [PATCH] brcmfmac: Rename / replace old IO functions with simpler
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+ ones.
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+
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+Primarily this patch removes:
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+
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+brcmf_sdiod_f0_writeb()
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+brcmf_sdiod_reg_write()
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+brcmf_sdiod_reg_read()
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+
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+Since we no longer use the quirky method of deciding which function to
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+address via the address being accessed, take the opportunity to rename
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+some IO functions more in line with common kernel code. We also convert
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+those that map directly to sdio_{read,write}*() to macros.
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+
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+Signed-off-by: Ian Molton <[email protected]>
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+Reviewed-by: Arend van Spriel <[email protected]>
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+Signed-off-by: Arend van Spriel <[email protected]>
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+Signed-off-by: Kalle Valo <[email protected]>
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+---
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+ .../wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c | 169 +++----------------
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+ .../wireless/broadcom/brcm80211/brcmfmac/sdio.c | 186 ++++++++++-----------
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+ .../wireless/broadcom/brcm80211/brcmfmac/sdio.h | 28 +++-
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+ 3 files changed, 138 insertions(+), 245 deletions(-)
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+
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+--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c
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++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c
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+@@ -137,27 +137,27 @@ int brcmf_sdiod_intr_register(struct brc
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+ if (sdiodev->bus_if->chip == BRCM_CC_43362_CHIP_ID) {
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+ /* assign GPIO to SDIO core */
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+ addr = CORE_CC_REG(SI_ENUM_BASE, gpiocontrol);
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+- gpiocontrol = brcmf_sdiod_regrl(sdiodev, addr, &ret);
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++ gpiocontrol = brcmf_sdiod_readl(sdiodev, addr, &ret);
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+ gpiocontrol |= 0x2;
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+- brcmf_sdiod_regwl(sdiodev, addr, gpiocontrol, &ret);
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++ brcmf_sdiod_writel(sdiodev, addr, gpiocontrol, &ret);
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+
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+- brcmf_sdiod_regwb(sdiodev, SBSDIO_GPIO_SELECT, 0xf,
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+- &ret);
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+- brcmf_sdiod_regwb(sdiodev, SBSDIO_GPIO_OUT, 0, &ret);
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+- brcmf_sdiod_regwb(sdiodev, SBSDIO_GPIO_EN, 0x2, &ret);
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++ brcmf_sdiod_writeb(sdiodev, SBSDIO_GPIO_SELECT,
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++ 0xf, &ret);
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++ brcmf_sdiod_writeb(sdiodev, SBSDIO_GPIO_OUT, 0, &ret);
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++ brcmf_sdiod_writeb(sdiodev, SBSDIO_GPIO_EN, 0x2, &ret);
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+ }
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+
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+ /* must configure SDIO_CCCR_IENx to enable irq */
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+- data = brcmf_sdiod_regrb(sdiodev, SDIO_CCCR_IENx, &ret);
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++ data = brcmf_sdiod_func0_rb(sdiodev, SDIO_CCCR_IENx, &ret);
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+ data |= 1 << SDIO_FUNC_1 | 1 << SDIO_FUNC_2 | 1;
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+- brcmf_sdiod_regwb(sdiodev, SDIO_CCCR_IENx, data, &ret);
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++ brcmf_sdiod_func0_wb(sdiodev, SDIO_CCCR_IENx, data, &ret);
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+
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+ /* redirect, configure and enable io for interrupt signal */
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+ data = SDIO_SEPINT_MASK | SDIO_SEPINT_OE;
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+ if (pdata->oob_irq_flags & IRQF_TRIGGER_HIGH)
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+ data |= SDIO_SEPINT_ACT_HI;
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+- brcmf_sdiod_regwb(sdiodev, SDIO_CCCR_BRCM_SEPINT, data, &ret);
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+-
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++ brcmf_sdiod_func0_wb(sdiodev, SDIO_CCCR_BRCM_SEPINT,
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++ data, &ret);
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+ sdio_release_host(sdiodev->func[1]);
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+ } else {
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+ brcmf_dbg(SDIO, "Entering\n");
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+@@ -183,8 +183,8 @@ void brcmf_sdiod_intr_unregister(struct
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+
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+ pdata = &sdiodev->settings->bus.sdio;
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+ sdio_claim_host(sdiodev->func[1]);
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+- brcmf_sdiod_regwb(sdiodev, SDIO_CCCR_BRCM_SEPINT, 0, NULL);
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+- brcmf_sdiod_regwb(sdiodev, SDIO_CCCR_IENx, 0, NULL);
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++ brcmf_sdiod_func0_wb(sdiodev, SDIO_CCCR_BRCM_SEPINT, 0, NULL);
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++ brcmf_sdiod_func0_wb(sdiodev, SDIO_CCCR_IENx, 0, NULL);
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+ sdio_release_host(sdiodev->func[1]);
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+
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+ sdiodev->oob_irq_requested = false;
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+@@ -242,8 +242,8 @@ static int brcmf_sdiod_set_sbaddr_window
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+ addr = (address & SBSDIO_SBWINDOW_MASK) >> 8;
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+
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+ for (i = 0 ; i < 3 && !err ; i++, addr >>= 8)
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+- brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_SBADDRLOW + i,
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+- addr & 0xff, &err);
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++ brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_SBADDRLOW + i,
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++ addr & 0xff, &err);
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+
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+ return err;
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+ }
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+@@ -267,124 +267,15 @@ static int brcmf_sdiod_addrprep(struct b
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+ return 0;
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+ }
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+
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+-static inline int brcmf_sdiod_f0_writeb(struct sdio_func *func, u8 byte,
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+- uint regaddr)
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+-{
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+- int err_ret;
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+-
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+- /*
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+- * Can only directly write to some F0 registers.
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+- * Handle CCCR_IENx and CCCR_ABORT command
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+- * as a special case.
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+- */
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+- if ((regaddr == SDIO_CCCR_ABORT) ||
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+- (regaddr == SDIO_CCCR_IENx))
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+- sdio_writeb(func, byte, regaddr, &err_ret);
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+- else
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+- sdio_f0_writeb(func, byte, regaddr, &err_ret);
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+-
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+- return err_ret;
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+-}
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+-
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+-static int brcmf_sdiod_reg_write(struct brcmf_sdio_dev *sdiodev, u32 addr,
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+- u8 regsz, void *data)
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+-{
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+- int ret;
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+-
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+- /*
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+- * figure out how to read the register based on address range
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+- * 0x00 ~ 0x7FF: function 0 CCCR and FBR
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+- * 0x10000 ~ 0x1FFFF: function 1 miscellaneous registers
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+- * The rest: function 1 silicon backplane core registers
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+- * f0 writes must be bytewise
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+- */
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+-
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+- if ((addr & ~REG_F0_REG_MASK) == 0) {
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+- if (WARN_ON(regsz > 1))
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+- return -EINVAL;
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+- ret = brcmf_sdiod_f0_writeb(sdiodev->func[0],
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+- *(u8 *)data, addr);
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+- } else {
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+- switch (regsz) {
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+- case 1:
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+- sdio_writeb(sdiodev->func[1], *(u8 *)data, addr, &ret);
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+- break;
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+- case 4:
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+- ret = brcmf_sdiod_addrprep(sdiodev, &addr);
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+- if (ret)
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+- goto done;
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+-
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+- sdio_writel(sdiodev->func[1], *(u32 *)data, addr, &ret);
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+- break;
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+- default:
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+- WARN(1, "Invalid reg size\n");
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+- ret = -EINVAL;
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+- break;
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+- }
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+- }
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+-
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+-done:
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+- return ret;
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+-}
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+-
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+-static int brcmf_sdiod_reg_read(struct brcmf_sdio_dev *sdiodev, u32 addr,
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+- u8 regsz, void *data)
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+-{
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+- int ret;
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+-
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+- /*
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+- * figure out how to read the register based on address range
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+- * 0x00 ~ 0x7FF: function 0 CCCR and FBR
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+- * 0x10000 ~ 0x1FFFF: function 1 miscellaneous registers
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+- * The rest: function 1 silicon backplane core registers
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+- * f0 reads must be bytewise
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+- */
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+- if ((addr & ~REG_F0_REG_MASK) == 0) {
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+- if (WARN_ON(regsz > 1))
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+- return -EINVAL;
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+- *(u8 *)data = sdio_f0_readb(sdiodev->func[0], addr, &ret);
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+- } else {
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+- switch (regsz) {
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+- case 1:
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+- *(u8 *)data = sdio_readb(sdiodev->func[1], addr, &ret);
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+- break;
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+- case 4:
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+- ret = brcmf_sdiod_addrprep(sdiodev, &addr);
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+- if (ret)
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+- goto done;
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+-
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+- *(u32 *)data = sdio_readl(sdiodev->func[1], addr, &ret);
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+- break;
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+- default:
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+- WARN(1, "Invalid reg size\n");
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+- ret = -EINVAL;
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+- break;
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+- }
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+- }
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+-
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+-done:
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+- return ret;
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+-}
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+-
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+-u8 brcmf_sdiod_regrb(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret)
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++u32 brcmf_sdiod_readl(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret)
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+ {
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+- u8 data;
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++ u32 data = 0;
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+ int retval;
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+
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+- retval = brcmf_sdiod_reg_read(sdiodev, addr, 1, &data);
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++ retval = brcmf_sdiod_addrprep(sdiodev, &addr);
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+
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+- if (ret)
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+- *ret = retval;
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+-
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+- return data;
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+-}
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+-
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+-u32 brcmf_sdiod_regrl(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret)
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+-{
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+- u32 data;
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+- int retval;
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+-
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+- retval = brcmf_sdiod_reg_read(sdiodev, addr, 4, &data);
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++ if (!retval)
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++ data = sdio_readl(sdiodev->func[1], addr, &retval);
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+
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+ if (ret)
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+ *ret = retval;
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+@@ -392,23 +283,15 @@ u32 brcmf_sdiod_regrl(struct brcmf_sdio_
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+ return data;
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+ }
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+
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+-void brcmf_sdiod_regwb(struct brcmf_sdio_dev *sdiodev, u32 addr,
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+- u8 data, int *ret)
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++void brcmf_sdiod_writel(struct brcmf_sdio_dev *sdiodev, u32 addr,
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++ u32 data, int *ret)
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+ {
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+ int retval;
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+
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+- retval = brcmf_sdiod_reg_write(sdiodev, addr, 1, &data);
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+-
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+- if (ret)
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+- *ret = retval;
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+-}
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+-
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+-void brcmf_sdiod_regwl(struct brcmf_sdio_dev *sdiodev, u32 addr,
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+- u32 data, int *ret)
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+-{
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+- int retval;
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++ retval = brcmf_sdiod_addrprep(sdiodev, &addr);
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+
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+- retval = brcmf_sdiod_reg_write(sdiodev, addr, 4, &data);
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++ if (!retval)
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++ sdio_writel(sdiodev->func[1], data, addr, &retval);
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+
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+ if (ret)
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+ *ret = retval;
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+@@ -846,8 +729,8 @@ int brcmf_sdiod_abort(struct brcmf_sdio_
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+ {
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+ brcmf_dbg(SDIO, "Enter\n");
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+
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+- /* issue abort cmd52 command through F0 */
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+- brcmf_sdiod_reg_write(sdiodev, SDIO_CCCR_ABORT, 1, &fn);
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++ /* Issue abort cmd52 command through F0 */
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++ brcmf_sdiod_func0_wb(sdiodev, SDIO_CCCR_ABORT, fn, NULL);
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+
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+ brcmf_dbg(SDIO, "Exit\n");
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+ return 0;
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+--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
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++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
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+@@ -669,7 +669,7 @@ static int r_sdreg32(struct brcmf_sdio *
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+ int ret;
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+
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+ core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
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+- *regvar = brcmf_sdiod_regrl(bus->sdiodev, core->base + offset, &ret);
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++ *regvar = brcmf_sdiod_readl(bus->sdiodev, core->base + offset, &ret);
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+
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+ return ret;
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+ }
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+@@ -680,7 +680,7 @@ static int w_sdreg32(struct brcmf_sdio *
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+ int ret;
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+
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+ core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
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+- brcmf_sdiod_regwl(bus->sdiodev, core->base + reg_offset, regval, &ret);
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++ brcmf_sdiod_writel(bus->sdiodev, core->base + reg_offset, regval, &ret);
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+
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+ return ret;
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+ }
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+@@ -697,8 +697,7 @@ brcmf_sdio_kso_control(struct brcmf_sdio
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+
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+ wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
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+ /* 1st KSO write goes to AOS wake up core if device is asleep */
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+- brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
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+- wr_val, &err);
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++ brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, wr_val, &err);
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+
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+ if (on) {
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+ /* device WAKEUP through KSO:
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+@@ -724,7 +723,7 @@ brcmf_sdio_kso_control(struct brcmf_sdio
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+ * just one write attempt may fail,
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+ * read it back until it matches written value
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+ */
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+- rd_val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
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++ rd_val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
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+ &err);
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+ if (!err) {
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+ if ((rd_val & bmask) == cmp_val)
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+@@ -734,9 +733,11 @@ brcmf_sdio_kso_control(struct brcmf_sdio
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+ /* bail out upon subsequent access errors */
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+ if (err && (err_cnt++ > BRCMF_SDIO_MAX_ACCESS_ERRORS))
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+ break;
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++
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+ udelay(KSO_WAIT_US);
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+- brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
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+- wr_val, &err);
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++ brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, wr_val,
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++ &err);
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++
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+ } while (try_cnt++ < MAX_KSO_ATTEMPTS);
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+
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+ if (try_cnt > 2)
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+@@ -772,15 +773,15 @@ static int brcmf_sdio_htclk(struct brcmf
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+ clkreq =
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+ bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
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+
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+- brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
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+- clkreq, &err);
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++ brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
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++ clkreq, &err);
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+ if (err) {
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+ brcmf_err("HT Avail request error: %d\n", err);
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+ return -EBADE;
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+ }
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+
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+ /* Check current status */
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+- clkctl = brcmf_sdiod_regrb(bus->sdiodev,
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++ clkctl = brcmf_sdiod_readb(bus->sdiodev,
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+ SBSDIO_FUNC1_CHIPCLKCSR, &err);
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+ if (err) {
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+ brcmf_err("HT Avail read error: %d\n", err);
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+@@ -790,35 +791,34 @@ static int brcmf_sdio_htclk(struct brcmf
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+ /* Go to pending and await interrupt if appropriate */
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+ if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
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+ /* Allow only clock-available interrupt */
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+- devctl = brcmf_sdiod_regrb(bus->sdiodev,
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++ devctl = brcmf_sdiod_readb(bus->sdiodev,
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+ SBSDIO_DEVICE_CTL, &err);
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+ if (err) {
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+- brcmf_err("Devctl error setting CA: %d\n",
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+- err);
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++ brcmf_err("Devctl error setting CA: %d\n", err);
|
|
|
+ return -EBADE;
|
|
|
+ }
|
|
|
+
|
|
|
+ devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
|
|
|
+- brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
|
|
|
+- devctl, &err);
|
|
|
++ brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
|
|
|
++ devctl, &err);
|
|
|
+ brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
|
|
|
+ bus->clkstate = CLK_PENDING;
|
|
|
+
|
|
|
+ return 0;
|
|
|
+ } else if (bus->clkstate == CLK_PENDING) {
|
|
|
+ /* Cancel CA-only interrupt filter */
|
|
|
+- devctl = brcmf_sdiod_regrb(bus->sdiodev,
|
|
|
++ devctl = brcmf_sdiod_readb(bus->sdiodev,
|
|
|
+ SBSDIO_DEVICE_CTL, &err);
|
|
|
+ devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
|
|
|
+- brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
|
|
|
+- devctl, &err);
|
|
|
++ brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
|
|
|
++ devctl, &err);
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Otherwise, wait here (polling) for HT Avail */
|
|
|
+ timeout = jiffies +
|
|
|
+ msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
|
|
|
+ while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
|
|
|
+- clkctl = brcmf_sdiod_regrb(bus->sdiodev,
|
|
|
++ clkctl = brcmf_sdiod_readb(bus->sdiodev,
|
|
|
+ SBSDIO_FUNC1_CHIPCLKCSR,
|
|
|
+ &err);
|
|
|
+ if (time_after(jiffies, timeout))
|
|
|
+@@ -852,16 +852,16 @@ static int brcmf_sdio_htclk(struct brcmf
|
|
|
+
|
|
|
+ if (bus->clkstate == CLK_PENDING) {
|
|
|
+ /* Cancel CA-only interrupt filter */
|
|
|
+- devctl = brcmf_sdiod_regrb(bus->sdiodev,
|
|
|
++ devctl = brcmf_sdiod_readb(bus->sdiodev,
|
|
|
+ SBSDIO_DEVICE_CTL, &err);
|
|
|
+ devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
|
|
|
+- brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
|
|
|
+- devctl, &err);
|
|
|
++ brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
|
|
|
++ devctl, &err);
|
|
|
+ }
|
|
|
+
|
|
|
+ bus->clkstate = CLK_SDONLY;
|
|
|
+- brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
|
|
|
+- clkreq, &err);
|
|
|
++ brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
|
|
|
++ clkreq, &err);
|
|
|
+ brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
|
|
|
+ if (err) {
|
|
|
+ brcmf_err("Failed access turning clock off: %d\n",
|
|
|
+@@ -951,14 +951,14 @@ brcmf_sdio_bus_sleep(struct brcmf_sdio *
|
|
|
+
|
|
|
+ /* Going to sleep */
|
|
|
+ if (sleep) {
|
|
|
+- clkcsr = brcmf_sdiod_regrb(bus->sdiodev,
|
|
|
++ clkcsr = brcmf_sdiod_readb(bus->sdiodev,
|
|
|
+ SBSDIO_FUNC1_CHIPCLKCSR,
|
|
|
+ &err);
|
|
|
+ if ((clkcsr & SBSDIO_CSR_MASK) == 0) {
|
|
|
+ brcmf_dbg(SDIO, "no clock, set ALP\n");
|
|
|
+- brcmf_sdiod_regwb(bus->sdiodev,
|
|
|
+- SBSDIO_FUNC1_CHIPCLKCSR,
|
|
|
+- SBSDIO_ALP_AVAIL_REQ, &err);
|
|
|
++ brcmf_sdiod_writeb(bus->sdiodev,
|
|
|
++ SBSDIO_FUNC1_CHIPCLKCSR,
|
|
|
++ SBSDIO_ALP_AVAIL_REQ, &err);
|
|
|
+ }
|
|
|
+ err = brcmf_sdio_kso_control(bus, false);
|
|
|
+ } else {
|
|
|
+@@ -1178,16 +1178,16 @@ static void brcmf_sdio_rxfail(struct brc
|
|
|
+ if (abort)
|
|
|
+ brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
|
|
|
+
|
|
|
+- brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
|
|
|
+- SFC_RF_TERM, &err);
|
|
|
++ brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_RF_TERM,
|
|
|
++ &err);
|
|
|
+ bus->sdcnt.f1regdata++;
|
|
|
+
|
|
|
+ /* Wait until the packet has been flushed (device/FIFO stable) */
|
|
|
+ for (lastrbc = retries = 0xffff; retries > 0; retries--) {
|
|
|
+- hi = brcmf_sdiod_regrb(bus->sdiodev,
|
|
|
+- SBSDIO_FUNC1_RFRAMEBCHI, &err);
|
|
|
+- lo = brcmf_sdiod_regrb(bus->sdiodev,
|
|
|
+- SBSDIO_FUNC1_RFRAMEBCLO, &err);
|
|
|
++ hi = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_RFRAMEBCHI,
|
|
|
++ &err);
|
|
|
++ lo = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_RFRAMEBCLO,
|
|
|
++ &err);
|
|
|
+ bus->sdcnt.f1regdata += 2;
|
|
|
+
|
|
|
+ if ((hi == 0) && (lo == 0))
|
|
|
+@@ -1229,12 +1229,12 @@ static void brcmf_sdio_txfail(struct brc
|
|
|
+ bus->sdcnt.tx_sderrs++;
|
|
|
+
|
|
|
+ brcmf_sdiod_abort(sdiodev, SDIO_FUNC_2);
|
|
|
+- brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, NULL);
|
|
|
++ brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, NULL);
|
|
|
+ bus->sdcnt.f1regdata++;
|
|
|
+
|
|
|
+ for (i = 0; i < 3; i++) {
|
|
|
+- hi = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_WFRAMEBCHI, NULL);
|
|
|
+- lo = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_WFRAMEBCLO, NULL);
|
|
|
++ hi = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_WFRAMEBCHI, NULL);
|
|
|
++ lo = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_WFRAMEBCLO, NULL);
|
|
|
+ bus->sdcnt.f1regdata += 2;
|
|
|
+ if ((hi == 0) && (lo == 0))
|
|
|
+ break;
|
|
|
+@@ -2446,11 +2446,11 @@ static void brcmf_sdio_bus_stop(struct d
|
|
|
+ bus->hostintmask = 0;
|
|
|
+
|
|
|
+ /* Force backplane clocks to assure F2 interrupt propagates */
|
|
|
+- saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
|
|
|
++ saveclk = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
|
|
|
+ &err);
|
|
|
+ if (!err)
|
|
|
+- brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
|
|
|
+- (saveclk | SBSDIO_FORCE_HT), &err);
|
|
|
++ brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
|
|
|
++ (saveclk | SBSDIO_FORCE_HT), &err);
|
|
|
+ if (err)
|
|
|
+ brcmf_err("Failed to force clock for F2: err %d\n",
|
|
|
+ err);
|
|
|
+@@ -2509,7 +2509,7 @@ static int brcmf_sdio_intr_rstatus(struc
|
|
|
+ buscore = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
|
|
|
+ addr = buscore->base + offsetof(struct sdpcmd_regs, intstatus);
|
|
|
+
|
|
|
+- val = brcmf_sdiod_regrl(bus->sdiodev, addr, &ret);
|
|
|
++ val = brcmf_sdiod_readl(bus->sdiodev, addr, &ret);
|
|
|
+ bus->sdcnt.f1regdata++;
|
|
|
+ if (ret != 0)
|
|
|
+ return ret;
|
|
|
+@@ -2519,7 +2519,7 @@ static int brcmf_sdio_intr_rstatus(struc
|
|
|
+
|
|
|
+ /* Clear interrupts */
|
|
|
+ if (val) {
|
|
|
+- brcmf_sdiod_regwl(bus->sdiodev, addr, val, &ret);
|
|
|
++ brcmf_sdiod_writel(bus->sdiodev, addr, val, &ret);
|
|
|
+ bus->sdcnt.f1regdata++;
|
|
|
+ atomic_or(val, &bus->intstatus);
|
|
|
+ }
|
|
|
+@@ -2545,23 +2545,23 @@ static void brcmf_sdio_dpc(struct brcmf_
|
|
|
+
|
|
|
+ #ifdef DEBUG
|
|
|
+ /* Check for inconsistent device control */
|
|
|
+- devctl = brcmf_sdiod_regrb(bus->sdiodev,
|
|
|
+- SBSDIO_DEVICE_CTL, &err);
|
|
|
++ devctl = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_DEVICE_CTL,
|
|
|
++ &err);
|
|
|
+ #endif /* DEBUG */
|
|
|
+
|
|
|
+ /* Read CSR, if clock on switch to AVAIL, else ignore */
|
|
|
+- clkctl = brcmf_sdiod_regrb(bus->sdiodev,
|
|
|
++ clkctl = brcmf_sdiod_readb(bus->sdiodev,
|
|
|
+ SBSDIO_FUNC1_CHIPCLKCSR, &err);
|
|
|
+
|
|
|
+ brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
|
|
|
+ devctl, clkctl);
|
|
|
+
|
|
|
+ if (SBSDIO_HTAV(clkctl)) {
|
|
|
+- devctl = brcmf_sdiod_regrb(bus->sdiodev,
|
|
|
++ devctl = brcmf_sdiod_readb(bus->sdiodev,
|
|
|
+ SBSDIO_DEVICE_CTL, &err);
|
|
|
+ devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
|
|
|
+- brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
|
|
|
+- devctl, &err);
|
|
|
++ brcmf_sdiod_writeb(bus->sdiodev,
|
|
|
++ SBSDIO_DEVICE_CTL, devctl, &err);
|
|
|
+ bus->clkstate = CLK_AVAIL;
|
|
|
+ }
|
|
|
+ }
|
|
|
+@@ -3347,31 +3347,31 @@ static void brcmf_sdio_sr_init(struct br
|
|
|
+
|
|
|
+ brcmf_dbg(TRACE, "Enter\n");
|
|
|
+
|
|
|
+- val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
|
|
|
++ val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
|
|
|
+ if (err) {
|
|
|
+ brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
|
|
|
+ return;
|
|
|
+ }
|
|
|
+
|
|
|
+ val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
|
|
|
+- brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
|
|
|
++ brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
|
|
|
+ if (err) {
|
|
|
+ brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
|
|
|
+ return;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Add CMD14 Support */
|
|
|
+- brcmf_sdiod_regwb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
|
|
|
+- (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
|
|
|
+- SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
|
|
|
+- &err);
|
|
|
++ brcmf_sdiod_func0_wb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
|
|
|
++ (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
|
|
|
++ SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
|
|
|
++ &err);
|
|
|
+ if (err) {
|
|
|
+ brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
|
|
|
+ return;
|
|
|
+ }
|
|
|
+
|
|
|
+- brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
|
|
|
+- SBSDIO_FORCE_HT, &err);
|
|
|
++ brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
|
|
|
++ SBSDIO_FORCE_HT, &err);
|
|
|
+ if (err) {
|
|
|
+ brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
|
|
|
+ return;
|
|
|
+@@ -3394,7 +3394,7 @@ static int brcmf_sdio_kso_init(struct br
|
|
|
+ if (brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV)->rev < 12)
|
|
|
+ return 0;
|
|
|
+
|
|
|
+- val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
|
|
|
++ val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
|
|
|
+ if (err) {
|
|
|
+ brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
|
|
|
+ return err;
|
|
|
+@@ -3403,8 +3403,8 @@ static int brcmf_sdio_kso_init(struct br
|
|
|
+ if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
|
|
|
+ val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
|
|
|
+ SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
|
|
|
+- brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
|
|
|
+- val, &err);
|
|
|
++ brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
|
|
|
++ val, &err);
|
|
|
+ if (err) {
|
|
|
+ brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
|
|
|
+ return err;
|
|
|
+@@ -3565,9 +3565,9 @@ static void brcmf_sdio_bus_watchdog(stru
|
|
|
+ u8 devpend;
|
|
|
+
|
|
|
+ sdio_claim_host(bus->sdiodev->func[1]);
|
|
|
+- devpend = brcmf_sdiod_regrb(bus->sdiodev,
|
|
|
+- SDIO_CCCR_INTx,
|
|
|
+- NULL);
|
|
|
++ devpend = brcmf_sdiod_func0_rb(bus->sdiodev,
|
|
|
++ SDIO_CCCR_INTx,
|
|
|
++ NULL);
|
|
|
+ sdio_release_host(bus->sdiodev->func[1]);
|
|
|
+ intstatus = devpend & (INTR_STATUS_FUNC1 |
|
|
|
+ INTR_STATUS_FUNC2);
|
|
|
+@@ -3705,12 +3705,12 @@ brcmf_sdio_drivestrengthinit(struct brcm
|
|
|
+ }
|
|
|
+ }
|
|
|
+ addr = CORE_CC_REG(pmu->base, chipcontrol_addr);
|
|
|
+- brcmf_sdiod_regwl(sdiodev, addr, 1, NULL);
|
|
|
+- cc_data_temp = brcmf_sdiod_regrl(sdiodev, addr, NULL);
|
|
|
++ brcmf_sdiod_writel(sdiodev, addr, 1, NULL);
|
|
|
++ cc_data_temp = brcmf_sdiod_readl(sdiodev, addr, NULL);
|
|
|
+ cc_data_temp &= ~str_mask;
|
|
|
+ drivestrength_sel <<= str_shift;
|
|
|
+ cc_data_temp |= drivestrength_sel;
|
|
|
+- brcmf_sdiod_regwl(sdiodev, addr, cc_data_temp, NULL);
|
|
|
++ brcmf_sdiod_writel(sdiodev, addr, cc_data_temp, NULL);
|
|
|
+
|
|
|
+ brcmf_dbg(INFO, "SDIO: %d mA (req=%d mA) drive strength selected, set to 0x%08x\n",
|
|
|
+ str_tab[i].strength, drivestrength, cc_data_temp);
|
|
|
+@@ -3725,7 +3725,7 @@ static int brcmf_sdio_buscoreprep(void *
|
|
|
+
|
|
|
+ /* Try forcing SDIO core to do ALPAvail request only */
|
|
|
+ clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ;
|
|
|
+- brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
|
|
|
++ brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
|
|
|
+ if (err) {
|
|
|
+ brcmf_err("error writing for HT off\n");
|
|
|
+ return err;
|
|
|
+@@ -3733,8 +3733,7 @@ static int brcmf_sdio_buscoreprep(void *
|
|
|
+
|
|
|
+ /* If register supported, wait for ALPAvail and then force ALP */
|
|
|
+ /* This may take up to 15 milliseconds */
|
|
|
+- clkval = brcmf_sdiod_regrb(sdiodev,
|
|
|
+- SBSDIO_FUNC1_CHIPCLKCSR, NULL);
|
|
|
++ clkval = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, NULL);
|
|
|
+
|
|
|
+ if ((clkval & ~SBSDIO_AVBITS) != clkset) {
|
|
|
+ brcmf_err("ChipClkCSR access: wrote 0x%02x read 0x%02x\n",
|
|
|
+@@ -3742,10 +3741,11 @@ static int brcmf_sdio_buscoreprep(void *
|
|
|
+ return -EACCES;
|
|
|
+ }
|
|
|
+
|
|
|
+- SPINWAIT(((clkval = brcmf_sdiod_regrb(sdiodev,
|
|
|
+- SBSDIO_FUNC1_CHIPCLKCSR, NULL)),
|
|
|
+- !SBSDIO_ALPAV(clkval)),
|
|
|
+- PMU_MAX_TRANSITION_DLY);
|
|
|
++ SPINWAIT(((clkval = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
|
|
|
++ NULL)),
|
|
|
++ !SBSDIO_ALPAV(clkval)),
|
|
|
++ PMU_MAX_TRANSITION_DLY);
|
|
|
++
|
|
|
+ if (!SBSDIO_ALPAV(clkval)) {
|
|
|
+ brcmf_err("timeout on ALPAV wait, clkval 0x%02x\n",
|
|
|
+ clkval);
|
|
|
+@@ -3753,11 +3753,11 @@ static int brcmf_sdio_buscoreprep(void *
|
|
|
+ }
|
|
|
+
|
|
|
+ clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_FORCE_ALP;
|
|
|
+- brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
|
|
|
++ brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
|
|
|
+ udelay(65);
|
|
|
+
|
|
|
+ /* Also, disable the extra SDIO pull-ups */
|
|
|
+- brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);
|
|
|
++ brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);
|
|
|
+
|
|
|
+ return 0;
|
|
|
+ }
|
|
|
+@@ -3772,7 +3772,7 @@ static void brcmf_sdio_buscore_activate(
|
|
|
+ /* clear all interrupts */
|
|
|
+ core = brcmf_chip_get_core(chip, BCMA_CORE_SDIO_DEV);
|
|
|
+ reg_addr = core->base + offsetof(struct sdpcmd_regs, intstatus);
|
|
|
+- brcmf_sdiod_regwl(sdiodev, reg_addr, 0xFFFFFFFF, NULL);
|
|
|
++ brcmf_sdiod_writel(sdiodev, reg_addr, 0xFFFFFFFF, NULL);
|
|
|
+
|
|
|
+ if (rstvec)
|
|
|
+ /* Write reset vector to address 0 */
|
|
|
+@@ -3785,7 +3785,7 @@ static u32 brcmf_sdio_buscore_read32(voi
|
|
|
+ struct brcmf_sdio_dev *sdiodev = ctx;
|
|
|
+ u32 val, rev;
|
|
|
+
|
|
|
+- val = brcmf_sdiod_regrl(sdiodev, addr, NULL);
|
|
|
++ val = brcmf_sdiod_readl(sdiodev, addr, NULL);
|
|
|
+ if ((sdiodev->func[0]->device == SDIO_DEVICE_ID_BROADCOM_4335_4339 ||
|
|
|
+ sdiodev->func[0]->device == SDIO_DEVICE_ID_BROADCOM_4339) &&
|
|
|
+ addr == CORE_CC_REG(SI_ENUM_BASE, chipid)) {
|
|
|
+@@ -3802,7 +3802,7 @@ static void brcmf_sdio_buscore_write32(v
|
|
|
+ {
|
|
|
+ struct brcmf_sdio_dev *sdiodev = ctx;
|
|
|
+
|
|
|
+- brcmf_sdiod_regwl(sdiodev, addr, val, NULL);
|
|
|
++ brcmf_sdiod_writel(sdiodev, addr, val, NULL);
|
|
|
+ }
|
|
|
+
|
|
|
+ static const struct brcmf_buscore_ops brcmf_sdio_buscore_ops = {
|
|
|
+@@ -3826,18 +3826,18 @@ brcmf_sdio_probe_attach(struct brcmf_sdi
|
|
|
+ sdio_claim_host(sdiodev->func[1]);
|
|
|
+
|
|
|
+ pr_debug("F1 signature read @0x18000000=0x%4x\n",
|
|
|
+- brcmf_sdiod_regrl(sdiodev, SI_ENUM_BASE, NULL));
|
|
|
++ brcmf_sdiod_readl(sdiodev, SI_ENUM_BASE, NULL));
|
|
|
+
|
|
|
+ /*
|
|
|
+ * Force PLL off until brcmf_chip_attach()
|
|
|
+ * programs PLL control regs
|
|
|
+ */
|
|
|
+
|
|
|
+- brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
|
|
|
+- BRCMF_INIT_CLKCTL1, &err);
|
|
|
++ brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, BRCMF_INIT_CLKCTL1,
|
|
|
++ &err);
|
|
|
+ if (!err)
|
|
|
+- clkctl = brcmf_sdiod_regrb(sdiodev,
|
|
|
+- SBSDIO_FUNC1_CHIPCLKCSR, &err);
|
|
|
++ clkctl = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
|
|
|
++ &err);
|
|
|
+
|
|
|
+ if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
|
|
|
+ brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
|
|
|
+@@ -3897,25 +3897,25 @@ brcmf_sdio_probe_attach(struct brcmf_sdi
|
|
|
+ brcmf_sdio_drivestrengthinit(sdiodev, bus->ci, drivestrength);
|
|
|
+
|
|
|
+ /* Set card control so an SDIO card reset does a WLAN backplane reset */
|
|
|
+- reg_val = brcmf_sdiod_regrb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, &err);
|
|
|
++ reg_val = brcmf_sdiod_func0_rb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, &err);
|
|
|
+ if (err)
|
|
|
+ goto fail;
|
|
|
+
|
|
|
+ reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
|
|
|
+
|
|
|
+- brcmf_sdiod_regwb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
|
|
|
++ brcmf_sdiod_func0_wb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
|
|
|
+ if (err)
|
|
|
+ goto fail;
|
|
|
+
|
|
|
+ /* set PMUControl so a backplane reset does PMU state reload */
|
|
|
+ reg_addr = CORE_CC_REG(brcmf_chip_get_pmu(bus->ci)->base, pmucontrol);
|
|
|
+- reg_val = brcmf_sdiod_regrl(sdiodev, reg_addr, &err);
|
|
|
++ reg_val = brcmf_sdiod_readl(sdiodev, reg_addr, &err);
|
|
|
+ if (err)
|
|
|
+ goto fail;
|
|
|
+
|
|
|
+ reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
|
|
|
+
|
|
|
+- brcmf_sdiod_regwl(sdiodev, reg_addr, reg_val, &err);
|
|
|
++ brcmf_sdiod_writel(sdiodev, reg_addr, reg_val, &err);
|
|
|
+ if (err)
|
|
|
+ goto fail;
|
|
|
+
|
|
|
+@@ -4055,10 +4055,10 @@ static void brcmf_sdio_firmware_callback
|
|
|
+ goto release;
|
|
|
+
|
|
|
+ /* Force clocks on backplane to be sure F2 interrupt propagates */
|
|
|
+- saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, &err);
|
|
|
++ saveclk = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, &err);
|
|
|
+ if (!err) {
|
|
|
+- brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
|
|
|
+- (saveclk | SBSDIO_FORCE_HT), &err);
|
|
|
++ brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
|
|
|
++ (saveclk | SBSDIO_FORCE_HT), &err);
|
|
|
+ }
|
|
|
+ if (err) {
|
|
|
+ brcmf_err("Failed to force clock for F2: err %d\n", err);
|
|
|
+@@ -4080,7 +4080,7 @@ static void brcmf_sdio_firmware_callback
|
|
|
+ w_sdreg32(bus, bus->hostintmask,
|
|
|
+ offsetof(struct sdpcmd_regs, hostintmask));
|
|
|
+
|
|
|
+- brcmf_sdiod_regwb(sdiodev, SBSDIO_WATERMARK, 8, &err);
|
|
|
++ brcmf_sdiod_writeb(sdiodev, SBSDIO_WATERMARK, 8, &err);
|
|
|
+ } else {
|
|
|
+ /* Disable F2 again */
|
|
|
+ sdio_disable_func(sdiodev->func[SDIO_FUNC_2]);
|
|
|
+@@ -4091,8 +4091,8 @@ static void brcmf_sdio_firmware_callback
|
|
|
+ brcmf_sdio_sr_init(bus);
|
|
|
+ } else {
|
|
|
+ /* Restore previous clock setting */
|
|
|
+- brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
|
|
|
+- saveclk, &err);
|
|
|
++ brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
|
|
|
++ saveclk, &err);
|
|
|
+ }
|
|
|
+
|
|
|
+ if (err == 0) {
|
|
|
+@@ -4225,7 +4225,7 @@ struct brcmf_sdio *brcmf_sdio_probe(stru
|
|
|
+ bus->rxflow = false;
|
|
|
+
|
|
|
+ /* Done with backplane-dependent accesses, can drop clock... */
|
|
|
+- brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
|
|
|
++ brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
|
|
|
+
|
|
|
+ sdio_release_host(bus->sdiodev->func[1]);
|
|
|
+
|
|
|
+--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.h
|
|
|
++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.h
|
|
|
+@@ -50,6 +50,7 @@
|
|
|
+ #define SBSDIO_NUM_FUNCTION 3
|
|
|
+
|
|
|
+ /* function 0 vendor specific CCCR registers */
|
|
|
++
|
|
|
+ #define SDIO_CCCR_BRCM_CARDCAP 0xf0
|
|
|
+ #define SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT 0x02
|
|
|
+ #define SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT 0x04
|
|
|
+@@ -131,8 +132,6 @@
|
|
|
+ /* with b15, maps to 32-bit SB access */
|
|
|
+ #define SBSDIO_SB_ACCESS_2_4B_FLAG 0x08000
|
|
|
+
|
|
|
+-/* valid bits in SBSDIO_FUNC1_SBADDRxxx regs */
|
|
|
+-
|
|
|
+ /* Address bits from SBADDR regs */
|
|
|
+ #define SBSDIO_SBWINDOW_MASK 0xffff8000
|
|
|
+
|
|
|
+@@ -293,13 +292,24 @@ struct sdpcmd_regs {
|
|
|
+ int brcmf_sdiod_intr_register(struct brcmf_sdio_dev *sdiodev);
|
|
|
+ void brcmf_sdiod_intr_unregister(struct brcmf_sdio_dev *sdiodev);
|
|
|
+
|
|
|
+-/* sdio device register access interface */
|
|
|
+-u8 brcmf_sdiod_regrb(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret);
|
|
|
+-u32 brcmf_sdiod_regrl(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret);
|
|
|
+-void brcmf_sdiod_regwb(struct brcmf_sdio_dev *sdiodev, u32 addr, u8 data,
|
|
|
+- int *ret);
|
|
|
+-void brcmf_sdiod_regwl(struct brcmf_sdio_dev *sdiodev, u32 addr, u32 data,
|
|
|
+- int *ret);
|
|
|
++/* SDIO device register access interface */
|
|
|
++/* Accessors for SDIO Function 0 */
|
|
|
++#define brcmf_sdiod_func0_rb(sdiodev, addr, r) \
|
|
|
++ sdio_readb((sdiodev)->func[0], (addr), (r))
|
|
|
++
|
|
|
++#define brcmf_sdiod_func0_wb(sdiodev, addr, v, ret) \
|
|
|
++ sdio_writeb((sdiodev)->func[0], (v), (addr), (ret))
|
|
|
++
|
|
|
++/* Accessors for SDIO Function 1 */
|
|
|
++#define brcmf_sdiod_readb(sdiodev, addr, r) \
|
|
|
++ sdio_readb((sdiodev)->func[1], (addr), (r))
|
|
|
++
|
|
|
++#define brcmf_sdiod_writeb(sdiodev, addr, v, ret) \
|
|
|
++ sdio_writeb((sdiodev)->func[1], (v), (addr), (ret))
|
|
|
++
|
|
|
++u32 brcmf_sdiod_readl(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret);
|
|
|
++void brcmf_sdiod_writel(struct brcmf_sdio_dev *sdiodev, u32 addr, u32 data,
|
|
|
++ int *ret);
|
|
|
+
|
|
|
+ /* Buffer transfer to/from device (client) core via cmd53.
|
|
|
+ * fn: function number
|
Rafał Miłecki