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@@ -0,0 +1,485 @@
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+From efa968c18abab78c5e0c40a853caf286c3629a59 Mon Sep 17 00:00:00 2001
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+From: Pawel Dembicki <[email protected]>
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+Date: Tue, 17 Mar 2020 21:28:01 +0100
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+Subject: [PATCH v3] ARM: dts: kirkwood: Add Check Point L-50 board
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+
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+This patch adds dts for the Check Point L-50 from 600/1100 series
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+routers.
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+
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+Specification:
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+-CPU: Marvell Kirkwood 88F6821 1200MHz
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+-RAM: 512MB
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+-Flash: NAND 512MB
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+-WiFi: mPCIe card based on Atheros AR9287 b/g/n
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+-WAN: 1 Gigabit Port (Marvell 88E1116R PHY)
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+-LAN: 9 Gigabit Ports (2x Marvell 88E6171(5+3))
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+-USB: 2x USB2.0
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+-Express card slot
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+-SD card slot
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+-Serial console: RJ-45 115200 8n1
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+-Unsupported DSL
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+
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+Reviewed-by: Andrew Lunn <[email protected]>
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+Signed-off-by: Pawel Dembicki <[email protected]>
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+---
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+Changes in v3:
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+- fix typo and code style issues pointed by OpenWrt guys
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+Changes in v2:
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+- none
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+
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+ arch/arm/boot/dts/Makefile | 1 +
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+ arch/arm/boot/dts/kirkwood-l-50.dts | 438 ++++++++++++++++++++++++++++
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+ 2 files changed, 439 insertions(+)
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+ create mode 100644 arch/arm/boot/dts/kirkwood-l-50.dts
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+
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+--- a/arch/arm/boot/dts/Makefile
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++++ b/arch/arm/boot/dts/Makefile
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+@@ -270,6 +270,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \
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+ kirkwood-iomega_ix2_200.dtb \
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+ kirkwood-is2.dtb \
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+ kirkwood-km_kirkwood.dtb \
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++ kirkwood-l-50.dtb \
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+ kirkwood-laplug.dtb \
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+ kirkwood-linkstation-lsqvl.dtb \
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+ kirkwood-linkstation-lsvl.dtb \
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+--- /dev/null
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++++ b/arch/arm/boot/dts/kirkwood-l-50.dts
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+@@ -0,0 +1,438 @@
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++// SPDX-License-Identifier: GPL-2.0
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++/*
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++ * Check Point L-50 Board Description
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++ * Copyright 2020 Pawel Dembicki <[email protected]>
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++ */
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++
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++/dts-v1/;
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++
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++#include "kirkwood.dtsi"
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++#include "kirkwood-6281.dtsi"
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++
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++/ {
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++ model = "Check Point L-50";
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++ compatible = "checkpoint,l-50", "marvell,kirkwood-88f6281", "marvell,kirkwood";
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++
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++ memory {
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++ device_type = "memory";
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++ reg = <0x00000000 0x20000000>;
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++ };
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++
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++ chosen {
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++ bootargs = "console=ttyS0,115200n8";
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++ stdout-path = &uart0;
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++ };
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++
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++ ocp@f1000000 {
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++ pinctrl: pin-controller@10000 {
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++ pinctrl-0 = <&pmx_led38 &pmx_sysrst &pmx_button29>;
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++ pinctrl-names = "default";
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++
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++ pmx_sysrst: pmx-sysrst {
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++ marvell,pins = "mpp6";
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++ marvell,function = "sysrst";
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++ };
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++
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++ pmx_button29: pmx_button29 {
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++ marvell,pins = "mpp29";
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++ marvell,function = "gpio";
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++ };
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++
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++ pmx_led38: pmx_led38 {
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++ marvell,pins = "mpp38";
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++ marvell,function = "gpio";
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++ };
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++
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++ pmx_sdio_cd: pmx-sdio-cd {
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++ marvell,pins = "mpp46";
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++ marvell,function = "gpio";
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++ };
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++ };
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++
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++ serial@12000 {
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++ status = "okay";
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++ };
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++
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++ mvsdio@90000 {
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++ status = "okay";
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++ cd-gpios = <&gpio1 14 9>;
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++ };
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++
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++ i2c@11000 {
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++ status = "okay";
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++ clock-frequency = <400000>;
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++
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++ gpio2: gpio-expander@20{
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++ #gpio-cells = <2>;
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++ #interrupt-cells = <2>;
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++ compatible = "semtech,sx1505q";
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++ reg = <0x20>;
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++
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++ gpio-controller;
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++ };
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++
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++ /* Three GPIOs from 0x21 exp. are undescribed in dts:
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++ * 1: DSL module reset (active low)
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++ * 5: mPCIE reset (active low)
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++ * 6: Express card reset (active low)
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++ */
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++ gpio3: gpio-expander@21{
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++ #gpio-cells = <2>;
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++ #interrupt-cells = <2>;
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++ compatible = "semtech,sx1505q";
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++ reg = <0x21>;
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++
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++ gpio-controller;
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++ };
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++
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++ rtc@30 {
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++ compatible = "s35390a";
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++ reg = <0x30>;
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++ };
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++ };
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++ };
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++
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++ leds {
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++ compatible = "gpio-leds";
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++
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++ status_green {
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++ label = "l-50:green:status";
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++ gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
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++ };
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++
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++ status_red {
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++ label = "l-50:red:status";
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++ gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
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++ };
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++
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++ wifi {
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++ label = "l-50:green:wifi";
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++ gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
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++ linux,default-trigger = "phy0tpt";
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++ };
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++
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++ internet_green {
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++ label = "l-50:green:internet";
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++ gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
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++ };
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++
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++ internet_red {
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++ label = "l-50:red:internet";
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++ gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
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++ };
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++
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++ usb1_green {
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++ label = "l-50:green:usb1";
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++ gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
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++ linux,default-trigger = "usbport";
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++ trigger-sources = <&hub_port3>;
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++ };
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++
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++ usb1_red {
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++ label = "l-50:red:usb1";
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++ gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
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++ };
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++
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++ usb2_green {
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++ label = "l-50:green:usb2";
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++ gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
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++ linux,default-trigger = "usbport";
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++ trigger-sources = <&hub_port1>;
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++ };
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++
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++ usb2_red {
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++ label = "l-50:red:usb2";
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++ gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
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++ };
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++ };
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++
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++ usb2_pwr {
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++ compatible = "regulator-fixed";
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++ regulator-name = "usb2_pwr";
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++
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++ regulator-min-microvolt = <5000000>;
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++ regulator-max-microvolt = <5000000>;
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++ gpio = <&gpio3 3 GPIO_ACTIVE_LOW>;
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++ regulator-always-on;
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++ };
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++
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++ usb1_pwr {
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++ compatible = "regulator-fixed";
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++ regulator-name = "usb1_pwr";
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++
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++ regulator-min-microvolt = <5000000>;
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++ regulator-max-microvolt = <5000000>;
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++ gpio = <&gpio3 4 GPIO_ACTIVE_LOW>;
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++ regulator-always-on;
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++ };
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++
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++ mpcie_pwr {
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++ compatible = "regulator-fixed";
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++ regulator-name = "mpcie_pwr";
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++
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++ regulator-min-microvolt = <3300000>;
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++ regulator-max-microvolt = <3300000>;
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++ gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>;
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++ enable-active-high;
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++ regulator-always-on;
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++ };
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++
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++ express_card_pwr {
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++ compatible = "regulator-fixed";
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++ regulator-name = "express_card_pwr";
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++
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++ regulator-min-microvolt = <3300000>;
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++ regulator-max-microvolt = <3300000>;
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++ gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>;
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++ enable-active-high;
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++ regulator-always-on;
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++ };
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++
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++ keys {
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++ compatible = "gpio-keys";
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++
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++ factory_defaults {
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++ label = "factory_defaults";
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++ gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
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++ linux,code = <KEY_RESTART>;
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++ };
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++ };
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++};
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++
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++&mdio {
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++ status = "okay";
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++
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++ ethphy8: ethernet-phy@8 {
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++ reg = <0x08>;
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++ };
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++
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++ switch0: switch@10 {
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++ compatible = "marvell,mv88e6085";
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++ #address-cells = <1>;
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++ #size-cells = <0>;
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++ reg = <0x10>;
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++ dsa,member = <0 0>;
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++
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++ ports {
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++ #address-cells = <1>;
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++ #size-cells = <0>;
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++
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++ port@0 {
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++ reg = <0>;
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++ label = "lan5";
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++ };
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++
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++ port@1 {
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++ reg = <1>;
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++ label = "lan1";
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++ };
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++
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++ port@2 {
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++ reg = <2>;
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++ label = "lan6";
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++ };
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++
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++ port@3 {
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++ reg = <3>;
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++ label = "lan2";
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++ };
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++
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++ port@4 {
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++ reg = <4>;
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++ label = "lan7";
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++ };
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++
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++ switch0port5: port@5 {
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++ reg = <5>;
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++ phy-mode = "rgmii-txid";
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++ link = <&switch1port5>;
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++ fixed-link {
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++ speed = <1000>;
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++ full-duplex;
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++ };
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++ };
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++
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++ port@6 {
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++ reg = <6>;
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++ label = "cpu";
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++ phy-mode = "rgmii-id";
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++ ethernet = <ð1port>;
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++ fixed-link {
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++ speed = <1000>;
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++ full-duplex;
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++ };
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++ };
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++ };
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++ };
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++
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++ switch@11 {
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++ compatible = "marvell,mv88e6085";
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++ #address-cells = <1>;
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++ #size-cells = <0>;
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++ reg = <0x11>;
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++ dsa,member = <0 1>;
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++
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++ ports {
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++ #address-cells = <1>;
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++ #size-cells = <0>;
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++
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++ port@0 {
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++ reg = <0>;
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++ label = "lan3";
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++ };
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++
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++ port@1 {
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++ reg = <1>;
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++ label = "lan8";
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++ };
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++
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++ port@2 {
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++ reg = <2>;
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++ label = "lan4";
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++ };
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++
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++ port@3 {
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++ reg = <3>;
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++ label = "dmz";
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++ };
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++
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++ switch1port5: port@5 {
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++ reg = <5>;
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++ phy-mode = "rgmii-txid";
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++ link = <&switch0port5>;
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++ fixed-link {
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++ speed = <1000>;
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++ full-duplex;
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++ };
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++ };
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++
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++ port@6 {
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++ reg = <6>;
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++ label = "dsl";
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++ fixed-link {
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++ speed = <100>;
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++ full-duplex;
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++ };
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++ };
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++ };
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++ };
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++};
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++
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++ð0 {
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++ status = "okay";
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++ ethernet0-port@0 {
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++ phy-handle = <ðphy8>;
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++ };
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++};
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++
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++ð1 {
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++ status = "okay";
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++ ethernet1-port@0 {
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++ speed = <1000>;
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++ duplex = <1>;
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++ };
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++};
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++
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++&nand {
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++ status = "okay";
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++ pinctrl-0 = <&pmx_nand>;
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++ pinctrl-names = "default";
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++
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++ partition@0 {
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++ label = "u-boot";
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++ reg = <0x00000000 0x000c0000>;
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++ };
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++
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++ partition@a0000 {
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++ label = "bootldr-env";
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++ reg = <0x000c0000 0x00040000>;
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++ };
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++
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++ partition@100000 {
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++ label = "kernel-1";
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++ reg = <0x00100000 0x00800000>;
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++ };
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++
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++ partition@900000 {
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++ label = "rootfs-1";
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++ reg = <0x00900000 0x07100000>;
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++ };
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++
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++ partition@7a00000 {
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++ label = "kernel-2";
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++ reg = <0x07a00000 0x00800000>;
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++ };
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++
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++ partition@8200000 {
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++ label = "rootfs-2";
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++ reg = <0x08200000 0x07100000>;
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++ };
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++
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++ partition@f300000 {
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++ label = "default_sw";
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++ reg = <0x0f300000 0x07900000>;
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++ };
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++
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++ partition@16c00000 {
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++ label = "logs";
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++ reg = <0x16c00000 0x01800000>;
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++ };
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++
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++ partition@18400000 {
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++ label = "preset_cfg";
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++ reg = <0x18400000 0x00100000>;
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++ };
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++
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++ partition@18500000 {
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++ label = "adsl";
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++ reg = <0x18500000 0x00100000>;
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++ };
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++
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++ partition@18600000 {
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++ label = "storage";
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++ reg = <0x18600000 0x07a00000>;
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++ };
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++};
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++
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++&rtc {
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++ status = "disabled";
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++};
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++
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++&pciec {
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++ status = "okay";
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++};
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++
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++&pcie0 {
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++ status = "okay";
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++};
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++
|
|
|
++&sata_phy0 {
|
|
|
++ status = "disabled";
|
|
|
++};
|
|
|
++
|
|
|
++&sata_phy1 {
|
|
|
++ status = "disabled";
|
|
|
++};
|
|
|
++
|
|
|
++&usb0 {
|
|
|
++ #address-cells = <1>;
|
|
|
++ #size-cells = <0>;
|
|
|
++ status = "okay";
|
|
|
++
|
|
|
++ port@1 {
|
|
|
++ #address-cells = <1>;
|
|
|
++ #size-cells = <0>;
|
|
|
++ reg = <1>;
|
|
|
++ #trigger-source-cells = <0>;
|
|
|
++
|
|
|
++ hub_port1: port@1 {
|
|
|
++ reg = <1>;
|
|
|
++ #trigger-source-cells = <0>;
|
|
|
++ };
|
|
|
++
|
|
|
++ hub_port3: port@3 {
|
|
|
++ reg = <3>;
|
|
|
++ #trigger-source-cells = <0>;
|
|
|
++ };
|
|
|
++ };
|
|
|
++};
|