Reduce and split pcie controller memory ranges for en7523 SoC in order to properly load a pcie card on the second port. Signed-off-by: Lorenzo Bianconi <[email protected]>
@@ -157,7 +157,7 @@
clocks = <&scu EN7523_CLK_PCIE>;
clock-names = "sys_ck0";
bus-range = <0x00 0xff>;
- ranges = <0x82000000 0 0x20000000 0x20000000 0 0x8000000>;
+ ranges = <0x82000000 0 0x20000000 0x20000000 0 0x2000000>;
status = "disabled";
#interrupt-cells = <1>;
@@ -186,7 +186,7 @@
clock-names = "sys_ck1";
- ranges = <0x82000000 0 0x28000000 0x28000000 0 0x8000000>;
+ ranges = <0x82000000 0 0x22000000 0x22000000 0 0x2000000>;