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+From 098324288a63a6dcc44e96cc381aef3d5c48d89e Mon Sep 17 00:00:00 2001
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+From: Sander Vanheule <[email protected]>
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+Date: Mon, 10 May 2021 22:15:31 +0200
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+Subject: [PATCH] pinctrl: Add RTL8231 pin control and GPIO support
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+
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+This driver implements the GPIO and pin muxing features provided by the
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+RTL8231. The device should be instantiated as an MFD child, where the
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+parent device has already configured the regmap used for register
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+access.
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+
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+Debouncing is only available for the six highest GPIOs, and must be
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+emulated when other pins are used for (button) inputs. Although
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+described in the bindings, drive strength selection is currently not
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+implemented.
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+
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+Signed-off-by: Sander Vanheule <[email protected]>
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+---
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+ drivers/pinctrl/Kconfig | 11 +
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+ drivers/pinctrl/Makefile | 1 +
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+ drivers/pinctrl/pinctrl-rtl8231.c | 521 ++++++++++++++++++++++++++++++
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+ 3 files changed, 533 insertions(+)
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+ create mode 100644 drivers/pinctrl/pinctrl-rtl8231.c
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+
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+--- a/drivers/pinctrl/Kconfig
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++++ b/drivers/pinctrl/Kconfig
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+@@ -417,6 +417,17 @@ config PINCTRL_ROCKCHIP
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+ help
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+ This support pinctrl and GPIO driver for Rockchip SoCs.
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+
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++config PINCTRL_RTL8231
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++ tristate "Realtek RTL8231 GPIO expander's pin controller"
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++ depends on MFD_RTL8231
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++ default MFD_RTL8231
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++ select GPIO_REGMAP
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++ select GENERIC_PINCONF
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++ select GENERIC_PINMUX_FUNCTIONS
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++ help
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++ Support for RTL8231 expander's GPIOs and pin controller.
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++ When built as a module, the module will be called pinctrl-rtl8231.
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++
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+ config PINCTRL_SINGLE
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+ tristate "One-register-per-pin type device tree based pinctrl driver"
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+ depends on OF
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+--- a/drivers/pinctrl/Makefile
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++++ b/drivers/pinctrl/Makefile
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+@@ -43,6 +43,7 @@ obj-$(CONFIG_PINCTRL_PIC32) += pinctrl-p
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+ obj-$(CONFIG_PINCTRL_PISTACHIO) += pinctrl-pistachio.o
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+ obj-$(CONFIG_PINCTRL_RK805) += pinctrl-rk805.o
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+ obj-$(CONFIG_PINCTRL_ROCKCHIP) += pinctrl-rockchip.o
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++obj-$(CONFIG_PINCTRL_RTL8231) += pinctrl-rtl8231.o
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+ obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o
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+ obj-$(CONFIG_PINCTRL_ST) += pinctrl-st.o
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+ obj-$(CONFIG_PINCTRL_STMFX) += pinctrl-stmfx.o
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+--- /dev/null
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++++ b/drivers/pinctrl/pinctrl-rtl8231.c
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+@@ -0,0 +1,525 @@
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++// SPDX-License-Identifier: GPL-2.0-only
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++
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++#include <linux/bitfield.h>
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++#include <linux/gpio/driver.h>
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++#include <linux/gpio/regmap.h>
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++#include <linux/module.h>
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++#include <linux/pinctrl/pinconf.h>
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++#include <linux/pinctrl/pinctrl.h>
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++#include <linux/pinctrl/pinmux.h>
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++#include <linux/platform_device.h>
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++#include <linux/regmap.h>
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++
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++#include "core.h"
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++#include "pinmux.h"
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++#include <linux/mfd/rtl8231.h>
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++
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++#define RTL8231_NUM_GPIOS 37
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++#define RTL8231_DEBOUNCE_USEC 100000
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++#define RTL8231_DEBOUNCE_MIN_OFFSET 31
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++
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++struct rtl8231_pin_ctrl {
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++ struct pinctrl_desc pctl_desc;
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++ struct regmap *map;
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++};
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++
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++/*
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++ * Pin controller functionality
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++ */
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++static const char * const rtl8231_pin_function_names[] = {
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++ "gpio",
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++ "led",
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++ "pwm",
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++};
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++
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++enum rtl8231_pin_function {
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++ RTL8231_PIN_FUNCTION_GPIO = BIT(0),
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++ RTL8231_PIN_FUNCTION_LED = BIT(1),
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++ RTL8231_PIN_FUNCTION_PWM = BIT(2),
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++};
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++
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++struct rtl8231_pin_desc {
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++ const enum rtl8231_pin_function functions;
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++ const u8 reg;
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++ const u8 offset;
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++ const u8 gpio_function_value;
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++};
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++
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++#define RTL8231_PIN_DESC(_num, _func, _reg, _fld, _val) \
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++ [_num] = { \
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++ .functions = RTL8231_PIN_FUNCTION_GPIO | _func, \
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++ .reg = _reg, \
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++ .offset = _fld, \
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++ .gpio_function_value = _val, \
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++ }
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++#define RTL8231_GPIO_PIN_DESC(_num, _reg, _fld) \
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++ RTL8231_PIN_DESC(_num, 0, _reg, _fld, RTL8231_PIN_MODE_GPIO)
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++#define RTL8231_LED_PIN_DESC(_num, _reg, _fld) \
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++ RTL8231_PIN_DESC(_num, RTL8231_PIN_FUNCTION_LED, _reg, _fld, RTL8231_PIN_MODE_GPIO)
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++#define RTL8231_PWM_PIN_DESC(_num, _reg, _fld) \
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++ RTL8231_PIN_DESC(_num, RTL8231_PIN_FUNCTION_PWM, _reg, _fld, 0)
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++
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++/*
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++ * All pins have a GPIO/LED mux bit, but the bits for pins 35/36 are read-only. Use this bit
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++ * for the GPIO-only pin instead of a placeholder, so the rest of the logic can stay generic.
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++ */
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++static struct rtl8231_pin_desc rtl8231_pin_data[RTL8231_NUM_GPIOS] = {
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++ RTL8231_LED_PIN_DESC(0, RTL8231_REG_PIN_MODE0, 0),
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++ RTL8231_LED_PIN_DESC(1, RTL8231_REG_PIN_MODE0, 1),
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++ RTL8231_LED_PIN_DESC(2, RTL8231_REG_PIN_MODE0, 2),
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++ RTL8231_LED_PIN_DESC(3, RTL8231_REG_PIN_MODE0, 3),
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++ RTL8231_LED_PIN_DESC(4, RTL8231_REG_PIN_MODE0, 4),
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++ RTL8231_LED_PIN_DESC(5, RTL8231_REG_PIN_MODE0, 5),
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++ RTL8231_LED_PIN_DESC(6, RTL8231_REG_PIN_MODE0, 6),
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++ RTL8231_LED_PIN_DESC(7, RTL8231_REG_PIN_MODE0, 7),
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++ RTL8231_LED_PIN_DESC(8, RTL8231_REG_PIN_MODE0, 8),
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++ RTL8231_LED_PIN_DESC(9, RTL8231_REG_PIN_MODE0, 9),
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++ RTL8231_LED_PIN_DESC(10, RTL8231_REG_PIN_MODE0, 10),
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++ RTL8231_LED_PIN_DESC(11, RTL8231_REG_PIN_MODE0, 11),
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++ RTL8231_LED_PIN_DESC(12, RTL8231_REG_PIN_MODE0, 12),
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++ RTL8231_LED_PIN_DESC(13, RTL8231_REG_PIN_MODE0, 13),
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++ RTL8231_LED_PIN_DESC(14, RTL8231_REG_PIN_MODE0, 14),
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++ RTL8231_LED_PIN_DESC(15, RTL8231_REG_PIN_MODE0, 15),
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++ RTL8231_LED_PIN_DESC(16, RTL8231_REG_PIN_MODE1, 0),
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++ RTL8231_LED_PIN_DESC(17, RTL8231_REG_PIN_MODE1, 1),
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++ RTL8231_LED_PIN_DESC(18, RTL8231_REG_PIN_MODE1, 2),
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++ RTL8231_LED_PIN_DESC(19, RTL8231_REG_PIN_MODE1, 3),
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++ RTL8231_LED_PIN_DESC(20, RTL8231_REG_PIN_MODE1, 4),
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++ RTL8231_LED_PIN_DESC(21, RTL8231_REG_PIN_MODE1, 5),
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++ RTL8231_LED_PIN_DESC(22, RTL8231_REG_PIN_MODE1, 6),
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++ RTL8231_LED_PIN_DESC(23, RTL8231_REG_PIN_MODE1, 7),
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++ RTL8231_LED_PIN_DESC(24, RTL8231_REG_PIN_MODE1, 8),
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++ RTL8231_LED_PIN_DESC(25, RTL8231_REG_PIN_MODE1, 9),
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++ RTL8231_LED_PIN_DESC(26, RTL8231_REG_PIN_MODE1, 10),
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++ RTL8231_LED_PIN_DESC(27, RTL8231_REG_PIN_MODE1, 11),
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++ RTL8231_LED_PIN_DESC(28, RTL8231_REG_PIN_MODE1, 12),
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++ RTL8231_LED_PIN_DESC(29, RTL8231_REG_PIN_MODE1, 13),
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++ RTL8231_LED_PIN_DESC(30, RTL8231_REG_PIN_MODE1, 14),
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++ RTL8231_LED_PIN_DESC(31, RTL8231_REG_PIN_MODE1, 15),
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++ RTL8231_LED_PIN_DESC(32, RTL8231_REG_PIN_HI_CFG, 0),
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++ RTL8231_LED_PIN_DESC(33, RTL8231_REG_PIN_HI_CFG, 1),
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++ RTL8231_LED_PIN_DESC(34, RTL8231_REG_PIN_HI_CFG, 2),
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++ RTL8231_PWM_PIN_DESC(35, RTL8231_REG_FUNC1, 3),
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++ RTL8231_GPIO_PIN_DESC(36, RTL8231_REG_PIN_HI_CFG, 4),
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++};
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++
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++#define RTL8231_PIN(_num) \
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++ { \
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++ .number = _num, \
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++ .name = "gpio" #_num, \
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++ .drv_data = &rtl8231_pin_data[_num] \
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++ }
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++
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++static const struct pinctrl_pin_desc rtl8231_pins[RTL8231_NUM_GPIOS] = {
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++ RTL8231_PIN(0),
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++ RTL8231_PIN(1),
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++ RTL8231_PIN(2),
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++ RTL8231_PIN(3),
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++ RTL8231_PIN(4),
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++ RTL8231_PIN(5),
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++ RTL8231_PIN(6),
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++ RTL8231_PIN(7),
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++ RTL8231_PIN(8),
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++ RTL8231_PIN(9),
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++ RTL8231_PIN(10),
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++ RTL8231_PIN(11),
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++ RTL8231_PIN(12),
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++ RTL8231_PIN(13),
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++ RTL8231_PIN(14),
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++ RTL8231_PIN(15),
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++ RTL8231_PIN(16),
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++ RTL8231_PIN(17),
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++ RTL8231_PIN(18),
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++ RTL8231_PIN(19),
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++ RTL8231_PIN(20),
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++ RTL8231_PIN(21),
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++ RTL8231_PIN(22),
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++ RTL8231_PIN(23),
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++ RTL8231_PIN(24),
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++ RTL8231_PIN(25),
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++ RTL8231_PIN(26),
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++ RTL8231_PIN(27),
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++ RTL8231_PIN(28),
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++ RTL8231_PIN(29),
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++ RTL8231_PIN(30),
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++ RTL8231_PIN(31),
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++ RTL8231_PIN(32),
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++ RTL8231_PIN(33),
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++ RTL8231_PIN(34),
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++ RTL8231_PIN(35),
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++ RTL8231_PIN(36),
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++};
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++
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++static int rtl8231_get_groups_count(struct pinctrl_dev *pctldev)
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++{
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++ return ARRAY_SIZE(rtl8231_pins);
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++}
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++
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++static const char *rtl8231_get_group_name(struct pinctrl_dev *pctldev, unsigned int selector)
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++{
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++ return rtl8231_pins[selector].name;
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++}
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++
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++static int rtl8231_get_group_pins(struct pinctrl_dev *pctldev, unsigned int selector,
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++ const unsigned int **pins, unsigned int *num_pins)
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++{
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++ if (selector >= ARRAY_SIZE(rtl8231_pins))
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++ return -EINVAL;
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++
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++ *pins = &rtl8231_pins[selector].number;
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++ *num_pins = 1;
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++
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++ return 0;
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++}
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++
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++static const struct pinctrl_ops rtl8231_pinctrl_ops = {
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++ .get_groups_count = rtl8231_get_groups_count,
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++ .get_group_name = rtl8231_get_group_name,
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++ .get_group_pins = rtl8231_get_group_pins,
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++ .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
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++ .dt_free_map = pinconf_generic_dt_free_map,
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++};
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++
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++static int rtl8231_set_mux(struct pinctrl_dev *pctldev, unsigned int func_selector,
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++ unsigned int group_selector)
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++{
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++ const struct function_desc *func = pinmux_generic_get_function(pctldev, func_selector);
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++ const struct rtl8231_pin_desc *desc = rtl8231_pins[group_selector].drv_data;
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++ const struct rtl8231_pin_ctrl *ctrl = pinctrl_dev_get_drvdata(pctldev);
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++ unsigned int func_flag = (uintptr_t) func->data;
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++ unsigned int function_mask;
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++ unsigned int gpio_function;
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++
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++ if (!(desc->functions & func_flag))
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++ return -EINVAL;
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++
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++ function_mask = BIT(desc->offset);
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++ gpio_function = desc->gpio_function_value << desc->offset;
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++
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++ if (func_flag == RTL8231_PIN_FUNCTION_GPIO)
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++ return regmap_update_bits(ctrl->map, desc->reg, function_mask, gpio_function);
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++ else
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++ return regmap_update_bits(ctrl->map, desc->reg, function_mask, ~gpio_function);
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++}
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++
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++static int rtl8231_gpio_request_enable(struct pinctrl_dev *pctldev,
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++ struct pinctrl_gpio_range *range, unsigned int offset)
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++{
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++ const struct rtl8231_pin_desc *desc = rtl8231_pins[offset].drv_data;
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++ struct rtl8231_pin_ctrl *ctrl = pinctrl_dev_get_drvdata(pctldev);
|
|
|
|
|
++ unsigned int function_mask;
|
|
|
|
|
++ unsigned int gpio_function;
|
|
|
|
|
++
|
|
|
|
|
++ function_mask = BIT(desc->offset);
|
|
|
|
|
++ gpio_function = desc->gpio_function_value << desc->offset;
|
|
|
|
|
++
|
|
|
|
|
++ return regmap_update_bits(ctrl->map, desc->reg, function_mask, gpio_function);
|
|
|
|
|
++}
|
|
|
|
|
++
|
|
|
|
|
++static const struct pinmux_ops rtl8231_pinmux_ops = {
|
|
|
|
|
++ .get_functions_count = pinmux_generic_get_function_count,
|
|
|
|
|
++ .get_function_name = pinmux_generic_get_function_name,
|
|
|
|
|
++ .get_function_groups = pinmux_generic_get_function_groups,
|
|
|
|
|
++ .set_mux = rtl8231_set_mux,
|
|
|
|
|
++ .gpio_request_enable = rtl8231_gpio_request_enable,
|
|
|
|
|
++ .strict = true,
|
|
|
|
|
++};
|
|
|
|
|
++
|
|
|
|
|
++static int rtl8231_pin_config_get(struct pinctrl_dev *pctldev, unsigned int offset,
|
|
|
|
|
++ unsigned long *config)
|
|
|
|
|
++{
|
|
|
|
|
++ struct rtl8231_pin_ctrl *ctrl = pinctrl_dev_get_drvdata(pctldev);
|
|
|
|
|
++ unsigned int param = pinconf_to_config_param(*config);
|
|
|
|
|
++ unsigned int arg;
|
|
|
|
|
++ int err;
|
|
|
|
|
++ int v;
|
|
|
|
|
++
|
|
|
|
|
++ switch (param) {
|
|
|
|
|
++ case PIN_CONFIG_INPUT_DEBOUNCE:
|
|
|
|
|
++ if (offset < RTL8231_DEBOUNCE_MIN_OFFSET)
|
|
|
|
|
++ return -EINVAL;
|
|
|
|
|
++
|
|
|
|
|
++ err = regmap_read(ctrl->map, RTL8231_REG_FUNC1, &v);
|
|
|
|
|
++ if (err)
|
|
|
|
|
++ return err;
|
|
|
|
|
++
|
|
|
|
|
++ v = FIELD_GET(RTL8231_FUNC1_DEBOUNCE_MASK, v);
|
|
|
|
|
++ if (v & BIT(offset - RTL8231_DEBOUNCE_MIN_OFFSET))
|
|
|
|
|
++ arg = RTL8231_DEBOUNCE_USEC;
|
|
|
|
|
++ else
|
|
|
|
|
++ arg = 0;
|
|
|
|
|
++ break;
|
|
|
|
|
++ default:
|
|
|
|
|
++ return -ENOTSUPP;
|
|
|
|
|
++ }
|
|
|
|
|
++
|
|
|
|
|
++ *config = pinconf_to_config_packed(param, arg);
|
|
|
|
|
++
|
|
|
|
|
++ return 0;
|
|
|
|
|
++}
|
|
|
|
|
++
|
|
|
|
|
++static int rtl8231_pin_config_set(struct pinctrl_dev *pctldev, unsigned int offset,
|
|
|
|
|
++ unsigned long *configs, unsigned int num_configs)
|
|
|
|
|
++{
|
|
|
|
|
++ struct rtl8231_pin_ctrl *ctrl = pinctrl_dev_get_drvdata(pctldev);
|
|
|
|
|
++ unsigned int param, arg;
|
|
|
|
|
++ unsigned int pin_mask;
|
|
|
|
|
++ int err;
|
|
|
|
|
++ int i;
|
|
|
|
|
++
|
|
|
|
|
++ for (i = 0; i < num_configs; i++) {
|
|
|
|
|
++ param = pinconf_to_config_param(configs[i]);
|
|
|
|
|
++ arg = pinconf_to_config_argument(configs[i]);
|
|
|
|
|
++
|
|
|
|
|
++ switch (param) {
|
|
|
|
|
++ case PIN_CONFIG_INPUT_DEBOUNCE:
|
|
|
|
|
++ if (offset < RTL8231_DEBOUNCE_MIN_OFFSET)
|
|
|
|
|
++ return -EINVAL;
|
|
|
|
|
++
|
|
|
|
|
++ pin_mask = FIELD_PREP(RTL8231_FUNC1_DEBOUNCE_MASK,
|
|
|
|
|
++ BIT(offset - RTL8231_DEBOUNCE_MIN_OFFSET));
|
|
|
|
|
++
|
|
|
|
|
++ switch (arg) {
|
|
|
|
|
++ case 0:
|
|
|
|
|
++ err = regmap_update_bits(ctrl->map, RTL8231_REG_FUNC1,
|
|
|
|
|
++ pin_mask, 0);
|
|
|
|
|
++ break;
|
|
|
|
|
++ case RTL8231_DEBOUNCE_USEC:
|
|
|
|
|
++ err = regmap_update_bits(ctrl->map, RTL8231_REG_FUNC1,
|
|
|
|
|
++ pin_mask, pin_mask);
|
|
|
|
|
++ break;
|
|
|
|
|
++ default:
|
|
|
|
|
++ return -EINVAL;
|
|
|
|
|
++ }
|
|
|
|
|
++
|
|
|
|
|
++ break;
|
|
|
|
|
++ default:
|
|
|
|
|
++ return -ENOTSUPP;
|
|
|
|
|
++ }
|
|
|
|
|
++ }
|
|
|
|
|
++
|
|
|
|
|
++ return err;
|
|
|
|
|
++}
|
|
|
|
|
++
|
|
|
|
|
++static const struct pinconf_ops rtl8231_pinconf_ops = {
|
|
|
|
|
++ .is_generic = true,
|
|
|
|
|
++ .pin_config_get = rtl8231_pin_config_get,
|
|
|
|
|
++ .pin_config_set = rtl8231_pin_config_set,
|
|
|
|
|
++};
|
|
|
|
|
++
|
|
|
|
|
++static int rtl8231_pinctrl_init_functions(struct pinctrl_dev *pctl, struct rtl8231_pin_ctrl *ctrl)
|
|
|
|
|
++{
|
|
|
|
|
++ const char *function_name;
|
|
|
|
|
++ const char **groups;
|
|
|
|
|
++ unsigned int f_idx;
|
|
|
|
|
++ unsigned int pin;
|
|
|
|
|
++ int num_groups;
|
|
|
|
|
++ int err;
|
|
|
|
|
++
|
|
|
|
|
++ for (f_idx = 0; f_idx < ARRAY_SIZE(rtl8231_pin_function_names); f_idx++) {
|
|
|
|
|
++ function_name = rtl8231_pin_function_names[f_idx];
|
|
|
|
|
++
|
|
|
|
|
++ for (pin = 0, num_groups = 0; pin < ctrl->pctl_desc.npins; pin++)
|
|
|
|
|
++ if (rtl8231_pin_data[pin].functions & BIT(f_idx))
|
|
|
|
|
++ num_groups++;
|
|
|
|
|
++
|
|
|
|
|
++ groups = devm_kcalloc(pctl->dev, num_groups, sizeof(*groups), GFP_KERNEL);
|
|
|
|
|
++ if (!groups)
|
|
|
|
|
++ return -ENOMEM;
|
|
|
|
|
++
|
|
|
|
|
++ for (pin = 0, num_groups = 0; pin < ctrl->pctl_desc.npins; pin++)
|
|
|
|
|
++ if (rtl8231_pin_data[pin].functions & BIT(f_idx))
|
|
|
|
|
++ groups[num_groups++] = rtl8231_pins[pin].name;
|
|
|
|
|
++
|
|
|
|
|
++ err = pinmux_generic_add_function(pctl, function_name, groups, num_groups,
|
|
|
|
|
++ (void *) BIT(f_idx));
|
|
|
|
|
++ if (err < 0)
|
|
|
|
|
++ return err;
|
|
|
|
|
++ }
|
|
|
|
|
++
|
|
|
|
|
++ return 0;
|
|
|
|
|
++}
|
|
|
|
|
++
|
|
|
|
|
++struct pin_field_info {
|
|
|
|
|
++ const struct reg_field gpio_data;
|
|
|
|
|
++ const struct reg_field gpio_dir;
|
|
|
|
|
++ const struct reg_field mode;
|
|
|
|
|
++};
|
|
|
|
|
++
|
|
|
|
|
++static const struct pin_field_info pin_fields[] = {
|
|
|
|
|
++ {
|
|
|
|
|
++ .gpio_data = REG_FIELD(RTL8231_REG_GPIO_DATA0, 0, 15),
|
|
|
|
|
++ .gpio_dir = REG_FIELD(RTL8231_REG_GPIO_DIR0, 0, 15),
|
|
|
|
|
++ .mode = REG_FIELD(RTL8231_REG_PIN_MODE0, 0, 15),
|
|
|
|
|
++ },
|
|
|
|
|
++ {
|
|
|
|
|
++ .gpio_data = REG_FIELD(RTL8231_REG_GPIO_DATA1, 0, 15),
|
|
|
|
|
++ .gpio_dir = REG_FIELD(RTL8231_REG_GPIO_DIR1, 0, 15),
|
|
|
|
|
++ .mode = REG_FIELD(RTL8231_REG_PIN_MODE1, 0, 15),
|
|
|
|
|
++ },
|
|
|
|
|
++ {
|
|
|
|
|
++ .gpio_data = REG_FIELD(RTL8231_REG_GPIO_DATA2, 0, 4),
|
|
|
|
|
++ .gpio_dir = REG_FIELD(RTL8231_REG_PIN_HI_CFG, 5, 9),
|
|
|
|
|
++ .mode = REG_FIELD(RTL8231_REG_PIN_HI_CFG, 0, 4),
|
|
|
|
|
++ },
|
|
|
|
|
++};
|
|
|
|
|
++
|
|
|
|
|
++static int rtl8231_configure_safe(struct device *dev, struct regmap *map)
|
|
|
|
|
++{
|
|
|
|
|
++ struct regmap_field *field_data;
|
|
|
|
|
++ struct regmap_field *field_mode;
|
|
|
|
|
++ struct regmap_field *field_dir;
|
|
|
|
|
++ unsigned int is_output;
|
|
|
|
|
++ unsigned int is_gpio;
|
|
|
|
|
++ unsigned int data;
|
|
|
|
|
++ unsigned int mode;
|
|
|
|
|
++ unsigned int dir;
|
|
|
|
|
++ int err;
|
|
|
|
|
++
|
|
|
|
|
++ for (unsigned int i = 0; i < ARRAY_SIZE(pin_fields); i++) {
|
|
|
|
|
++ field_data = devm_regmap_field_alloc(dev, map, pin_fields[i].gpio_data);
|
|
|
|
|
++ if (IS_ERR(field_data))
|
|
|
|
|
++ return PTR_ERR(field_data);
|
|
|
|
|
++
|
|
|
|
|
++ field_dir = devm_regmap_field_alloc(dev, map, pin_fields[i].gpio_dir);
|
|
|
|
|
++ if (IS_ERR(field_dir))
|
|
|
|
|
++ return PTR_ERR(field_dir);
|
|
|
|
|
++
|
|
|
|
|
++ field_mode = devm_regmap_field_alloc(dev, map, pin_fields[i].mode);
|
|
|
|
|
++ if (IS_ERR(field_mode))
|
|
|
|
|
++ return PTR_ERR(field_mode);
|
|
|
|
|
++
|
|
|
|
|
++ /* The register cache is invalid at start-up, so this should read from HW */
|
|
|
|
|
++ err = regmap_field_read(field_data, &data);
|
|
|
|
|
++ if (err)
|
|
|
|
|
++ return err;
|
|
|
|
|
++
|
|
|
|
|
++ err = regmap_field_read(field_dir, &dir);
|
|
|
|
|
++ if (err)
|
|
|
|
|
++ return err;
|
|
|
|
|
++
|
|
|
|
|
++ err = regmap_field_read(field_mode, &mode);
|
|
|
|
|
++ if (err)
|
|
|
|
|
++ return err;
|
|
|
|
|
++
|
|
|
|
|
++ /* Write back only the GPIO-out values to fix the cache */
|
|
|
|
|
++ data &= ~dir;
|
|
|
|
|
++ regmap_field_write(field_data, data);
|
|
|
|
|
++
|
|
|
|
|
++ /*
|
|
|
|
|
++ * Set every pin that is configured as gpio-output but muxed for the alternative
|
|
|
|
|
++ * (LED) function to gpio-in. That way the pin will be high impedance when it is
|
|
|
|
|
++ * muxed to GPIO, preventing unwanted glitches.
|
|
|
|
|
++ * The pin muxes are left as-is, so there are no signal changes.
|
|
|
|
|
++ */
|
|
|
|
|
++ is_gpio = mode;
|
|
|
|
|
++ is_output = ~dir;
|
|
|
|
|
++ regmap_field_write(field_dir, dir | (~is_gpio & is_output));
|
|
|
|
|
++
|
|
|
|
|
++ devm_regmap_field_free(dev, field_data);
|
|
|
|
|
++ devm_regmap_field_free(dev, field_dir);
|
|
|
|
|
++ devm_regmap_field_free(dev, field_mode);
|
|
|
|
|
++ }
|
|
|
|
|
++
|
|
|
|
|
++ return 0;
|
|
|
|
|
++}
|
|
|
|
|
++
|
|
|
|
|
++static int rtl8231_pinctrl_init(struct device *dev, struct rtl8231_pin_ctrl *ctrl)
|
|
|
|
|
++{
|
|
|
|
|
++ struct pinctrl_dev *pctldev;
|
|
|
|
|
++ int err;
|
|
|
|
|
++
|
|
|
|
|
++ ctrl->pctl_desc.name = "rtl8231-pinctrl";
|
|
|
|
|
++ ctrl->pctl_desc.owner = THIS_MODULE;
|
|
|
|
|
++ ctrl->pctl_desc.confops = &rtl8231_pinconf_ops;
|
|
|
|
|
++ ctrl->pctl_desc.pctlops = &rtl8231_pinctrl_ops;
|
|
|
|
|
++ ctrl->pctl_desc.pmxops = &rtl8231_pinmux_ops;
|
|
|
|
|
++ ctrl->pctl_desc.npins = ARRAY_SIZE(rtl8231_pins);
|
|
|
|
|
++ ctrl->pctl_desc.pins = rtl8231_pins;
|
|
|
|
|
++
|
|
|
|
|
++ err = devm_pinctrl_register_and_init(dev->parent, &ctrl->pctl_desc, ctrl, &pctldev);
|
|
|
|
|
++ if (err) {
|
|
|
|
|
++ dev_err(dev, "failed to register pin controller\n");
|
|
|
|
|
++ return err;
|
|
|
|
|
++ }
|
|
|
|
|
++
|
|
|
|
|
++ err = rtl8231_pinctrl_init_functions(pctldev, ctrl);
|
|
|
|
|
++ if (err)
|
|
|
|
|
++ return err;
|
|
|
|
|
++
|
|
|
|
|
++ err = pinctrl_enable(pctldev);
|
|
|
|
|
++ if (err)
|
|
|
|
|
++ dev_err(dev, "failed to enable pin controller\n");
|
|
|
|
|
++
|
|
|
|
|
++ return err;
|
|
|
|
|
++}
|
|
|
|
|
++
|
|
|
|
|
++/*
|
|
|
|
|
++ * GPIO controller functionality
|
|
|
|
|
++ */
|
|
|
|
|
++static int rtl8231_gpio_reg_mask_xlate(struct gpio_regmap *gpio, unsigned int base,
|
|
|
|
|
++ unsigned int offset, unsigned int *reg, unsigned int *mask)
|
|
|
|
|
++{
|
|
|
|
|
++ unsigned int pin_mask = BIT(offset % RTL8231_BITS_VAL);
|
|
|
|
|
++
|
|
|
|
|
++ if (base == RTL8231_REG_GPIO_DATA0 || offset < 32) {
|
|
|
|
|
++ *reg = base + offset / RTL8231_BITS_VAL;
|
|
|
|
|
++ *mask = pin_mask;
|
|
|
|
|
++ } else if (base == RTL8231_REG_GPIO_DIR0) {
|
|
|
|
|
++ *reg = RTL8231_REG_PIN_HI_CFG;
|
|
|
|
|
++ *mask = FIELD_PREP(RTL8231_PIN_HI_CFG_DIR_MASK, pin_mask);
|
|
|
|
|
++ } else {
|
|
|
|
|
++ return -EINVAL;
|
|
|
|
|
++ }
|
|
|
|
|
++
|
|
|
|
|
++ return 0;
|
|
|
|
|
++}
|
|
|
|
|
++
|
|
|
|
|
++static int rtl8231_pinctrl_probe(struct platform_device *pdev)
|
|
|
|
|
++{
|
|
|
|
|
++ struct device *dev = &pdev->dev;
|
|
|
|
|
++ struct rtl8231_pin_ctrl *ctrl;
|
|
|
|
|
++ struct gpio_regmap_config gpio_cfg = {};
|
|
|
|
|
++ int err;
|
|
|
|
|
++
|
|
|
|
|
++ ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL);
|
|
|
|
|
++ if (!ctrl)
|
|
|
|
|
++ return -ENOMEM;
|
|
|
|
|
++
|
|
|
|
|
++ ctrl->map = dev_get_regmap(dev->parent, NULL);
|
|
|
|
|
++ if (!ctrl->map)
|
|
|
|
|
++ return -ENODEV;
|
|
|
|
|
++
|
|
|
|
|
++ err = rtl8231_configure_safe(dev, ctrl->map);
|
|
|
|
|
++ if (err)
|
|
|
|
|
++ return err;
|
|
|
|
|
++
|
|
|
|
|
++ err = rtl8231_pinctrl_init(dev, ctrl);
|
|
|
|
|
++ if (err)
|
|
|
|
|
++ return err;
|
|
|
|
|
++
|
|
|
|
|
++ gpio_cfg.regmap = ctrl->map;
|
|
|
|
|
++ gpio_cfg.parent = dev->parent;
|
|
|
|
|
++ gpio_cfg.ngpio = RTL8231_NUM_GPIOS;
|
|
|
|
|
++ gpio_cfg.ngpio_per_reg = RTL8231_BITS_VAL;
|
|
|
|
|
++
|
|
|
|
|
++ gpio_cfg.reg_dat_base = GPIO_REGMAP_ADDR(RTL8231_REG_GPIO_DATA0);
|
|
|
|
|
++ gpio_cfg.reg_set_base = GPIO_REGMAP_ADDR(RTL8231_REG_GPIO_DATA0);
|
|
|
|
|
++ gpio_cfg.reg_dir_in_base = GPIO_REGMAP_ADDR(RTL8231_REG_GPIO_DIR0);
|
|
|
|
|
++
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++ gpio_cfg.reg_mask_xlate = rtl8231_gpio_reg_mask_xlate;
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++
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++ return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(dev, &gpio_cfg));
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++}
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++
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++static struct platform_driver rtl8231_pinctrl_driver = {
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++ .driver = {
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++ .name = "rtl8231-pinctrl",
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++ },
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++ .probe = rtl8231_pinctrl_probe,
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++};
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++module_platform_driver(rtl8231_pinctrl_driver);
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++
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++MODULE_AUTHOR("Sander Vanheule <[email protected]>");
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++MODULE_DESCRIPTION("Realtek RTL8231 pin control and GPIO support");
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++MODULE_LICENSE("GPL");
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