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+From b98994cb9bc24f5c7575c86650f96c384576fdfa Mon Sep 17 00:00:00 2001
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+From: Daniel Golle <[email protected]>
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+Date: Mon, 17 Nov 2025 02:54:19 +0000
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+Subject: [PATCH] mtd: spinand: esmt: add support for F50L1G41LC
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+
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+This adds support for ESMT F50L1G41LC, which appears to be an updated
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+version of the already supported F50L1G41LB.
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+Add esmt_8c SPI_NAND manufacturer to account for the newly used vendor
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+ID with support for the ESMT F50L1G41LC chip.
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+
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+Link: https://github.com/openwrt/openwrt/pull/15214#issuecomment-3514824435
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+Signed-off-by: Daniel Golle <[email protected]>
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+Signed-off-by: Miquel Raynal <[email protected]>
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+---
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+ drivers/mtd/nand/spi/core.c | 1 +
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+ drivers/mtd/nand/spi/esmt.c | 24 ++++++++++++++++++++++++
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+ include/linux/mtd/spinand.h | 1 +
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+ 3 files changed, 26 insertions(+)
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+
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+--- a/drivers/mtd/nand/spi/core.c
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++++ b/drivers/mtd/nand/spi/core.c
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+@@ -942,6 +942,7 @@ static const struct nand_ops spinand_ops
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+ static const struct spinand_manufacturer *spinand_manufacturers[] = {
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+ &alliancememory_spinand_manufacturer,
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+ &ato_spinand_manufacturer,
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++ &esmt_8c_spinand_manufacturer,
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+ &esmt_c8_spinand_manufacturer,
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+ &fmsh_spinand_manufacturer,
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+ &foresee_spinand_manufacturer,
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+--- a/drivers/mtd/nand/spi/esmt.c
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++++ b/drivers/mtd/nand/spi/esmt.c
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+@@ -11,6 +11,7 @@
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+
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+ /* ESMT uses GigaDevice 0xc8 JECDEC ID on some SPI NANDs */
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+ #define SPINAND_MFR_ESMT_C8 0xc8
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++#define SPINAND_MFR_ESMT_8C 0x8c
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+
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+ static SPINAND_OP_VARIANTS(read_cache_variants,
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+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
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+@@ -102,6 +103,19 @@ static const struct mtd_ooblayout_ops f5
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+ .free = f50l1g41lb_ooblayout_free,
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+ };
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+
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++
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++static const struct spinand_info esmt_8c_spinand_table[] = {
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++ SPINAND_INFO("F50L1G41LC",
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++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x2C),
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++ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
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++ NAND_ECCREQ(1, 512),
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++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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++ &write_cache_variants,
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++ &update_cache_variants),
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++ 0,
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++ SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)),
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++};
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++
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+ static const struct spinand_info esmt_c8_spinand_table[] = {
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+ SPINAND_INFO("F50L1G41LB",
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+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x01, 0x7f,
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+@@ -138,6 +152,14 @@ static const struct spinand_info esmt_c8
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+ static const struct spinand_manufacturer_ops esmt_spinand_manuf_ops = {
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+ };
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+
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++const struct spinand_manufacturer esmt_8c_spinand_manufacturer = {
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++ .id = SPINAND_MFR_ESMT_8C,
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++ .name = "ESMT",
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++ .chips = esmt_8c_spinand_table,
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++ .nchips = ARRAY_SIZE(esmt_8c_spinand_table),
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++ .ops = &esmt_spinand_manuf_ops,
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++};
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++
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+ const struct spinand_manufacturer esmt_c8_spinand_manufacturer = {
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+ .id = SPINAND_MFR_ESMT_C8,
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+ .name = "ESMT",
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+--- a/include/linux/mtd/spinand.h
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++++ b/include/linux/mtd/spinand.h
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+@@ -262,6 +262,7 @@ struct spinand_manufacturer {
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+ /* SPI NAND manufacturers */
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+ extern const struct spinand_manufacturer alliancememory_spinand_manufacturer;
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+ extern const struct spinand_manufacturer ato_spinand_manufacturer;
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++extern const struct spinand_manufacturer esmt_8c_spinand_manufacturer;
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+ extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer;
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+ extern const struct spinand_manufacturer fmsh_spinand_manufacturer;
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+ extern const struct spinand_manufacturer foresee_spinand_manufacturer;
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