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@@ -0,0 +1,59 @@
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+--- a/ath/if_ath.c
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++++ b/ath/if_ath.c
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+@@ -2785,6 +2785,44 @@
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+ return 1;
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+ }
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+
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++/* Fix up the ATIM window after TSF resync */
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++static int
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++ath_hw_check_atim(struct ath_softc *sc, int window)
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++{
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++#define AR5K_TIMER0_5210 0x802c /* Next beacon time register */
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++#define AR5K_TIMER0_5211 0x8028
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++#define AR5K_TIMER3_5210 0x8038 /* End of ATIM window time register */
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++#define AR5K_TIMER3_5211 0x8034
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++ struct ath_hal *ah = sc->sc_ah;
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++ unsigned int nbtt, atim;
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++ int dev = ar_device(sc->devid);
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++
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++ switch(dev) {
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++ case 5210:
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++ nbtt = OS_REG_READ(ah, AR5K_TIMER0_5210);
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++ atim = OS_REG_READ(ah, AR5K_TIMER3_5210);
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++ if (atim - nbtt != window) {
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++ OS_REG_WRITE(ah, AR5K_TIMER3_5210, nbtt + window );
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++ return atim - nbtt;
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++ }
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++ break;
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++ case 5211:
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++ case 5212:
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++ nbtt = OS_REG_READ(ah, AR5K_TIMER0_5211);
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++ atim = OS_REG_READ(ah, AR5K_TIMER3_5211);
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++ if (atim - nbtt != window) {
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++ OS_REG_WRITE(ah, AR5K_TIMER3_5211, nbtt + window );
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++ return atim - nbtt;
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++ }
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++ break;
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++ /* NB: 5416+ doesn't do ATIM in hw */
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++ default:
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++ break;
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++ }
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++ return 0;
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++}
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++
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++
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+ /*
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+ * Reset the hardware w/o losing operational state. This is
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+ * basically a more efficient way of doing ath_stop, ath_init,
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+@@ -6391,6 +6429,11 @@
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+ DPRINTF(sc, ATH_DEBUG_BEACON,
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+ "Updated beacon timers\n");
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+ }
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++ if ((sc->sc_opmode == IEEE80211_M_IBSS) &&
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++ IEEE80211_ADDR_EQ(ni->ni_bssid, vap->iv_bss->ni_bssid) &&
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++ ath_hw_check_atim(sc, 1)) {
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++ DPRINTF(sc, ATH_DEBUG_ANY, "Fixed ATIM window after beacon recv\n");
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++ }
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+ /* NB: Fall Through */
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+ case IEEE80211_FC0_SUBTYPE_PROBE_RESP:
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+ if (vap->iv_opmode == IEEE80211_M_IBSS &&
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