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@@ -0,0 +1,66 @@
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+From 0e1a71d84585ec33b479c2cb8c8d65a4f6734dbe Mon Sep 17 00:00:00 2001
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+From: Thomas Richard <[email protected]>
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+Date: Wed, 4 Dec 2024 14:26:52 +0100
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+Subject: [PATCH] Revert "feat(stm32mp1-fdts): remove RTC clock configuration"
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+
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+This reverts commit 703a581e2522bffe21b421c98994dc02aed2934c.
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+---
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+ fdts/stm32mp135f-dk.dts | 2 ++
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+ fdts/stm32mp157c-ed1.dts | 2 ++
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+ fdts/stm32mp15xx-dkx.dtsi | 2 ++
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+ 3 files changed, 6 insertions(+)
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+
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+--- a/fdts/stm32mp135f-dk.dts
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++++ b/fdts/stm32mp135f-dk.dts
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+@@ -190,6 +190,7 @@
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+ CLK_AXI_PLL2P
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+ CLK_MLAHBS_PLL3
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+ CLK_CKPER_HSE
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++ CLK_RTC_LSE
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+ CLK_SDMMC1_PLL4P
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+ CLK_SDMMC2_PLL4P
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+ CLK_STGEN_HSE
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+@@ -211,6 +212,7 @@
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+ DIV(DIV_APB4, 1)
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+ DIV(DIV_APB5, 2)
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+ DIV(DIV_APB6, 1)
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++ DIV(DIV_RTC, 0)
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+ >;
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+
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+ st,pll_vco {
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+--- a/fdts/stm32mp157c-ed1.dts
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++++ b/fdts/stm32mp157c-ed1.dts
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+@@ -194,6 +194,7 @@
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+ CLK_MPU_PLL1P
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+ CLK_AXI_PLL2P
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+ CLK_MCU_PLL3P
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++ CLK_RTC_LSE
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+ CLK_MCO1_DISABLED
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+ CLK_MCO2_DISABLED
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+ CLK_CKPER_HSE
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+@@ -242,6 +243,7 @@
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+ DIV(DIV_APB3, 1)
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+ DIV(DIV_APB4, 1)
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+ DIV(DIV_APB5, 2)
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++ DIV(DIV_RTC, 23)
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+ DIV(DIV_MCO1, 0)
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+ DIV(DIV_MCO2, 0)
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+ >;
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+--- a/fdts/stm32mp15xx-dkx.dtsi
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++++ b/fdts/stm32mp15xx-dkx.dtsi
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+@@ -198,6 +198,7 @@
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+ CLK_MPU_PLL1P
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+ CLK_AXI_PLL2P
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+ CLK_MCU_PLL3P
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++ CLK_RTC_LSE
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+ CLK_MCO1_DISABLED
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+ CLK_MCO2_DISABLED
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+ CLK_CKPER_HSE
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+@@ -246,6 +247,7 @@
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+ DIV(DIV_APB3, 1)
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+ DIV(DIV_APB4, 1)
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+ DIV(DIV_APB5, 2)
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++ DIV(DIV_RTC, 23)
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+ DIV(DIV_MCO1, 0)
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+ DIV(DIV_MCO2, 0)
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+ >;
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