|
|
@@ -44,8 +44,10 @@
|
|
|
#define UR8_REGS_WDT (AR7_REGS_BASE + 0x0b00)
|
|
|
#define UR8_REGS_UART1 (AR7_REGS_BASE + 0x0f00)
|
|
|
|
|
|
-#define TITAN_REGS_MAC0 (0x08640000)
|
|
|
-#define TITAN_REGS_MAC1 (TITAN_REGS_MAC0 + 0x0800)
|
|
|
+#define TITAN_REGS_ESWITCH_BASE (0x08640000)
|
|
|
+#define TITAN_REGS_MAC0 (TITAN_REGS_ESWITCH_BASE + 0)
|
|
|
+#define TITAN_REGS_MAC1 (TITAN_REGS_ESWITCH_BASE + 0x0800)
|
|
|
+#define TITAN_REGS_MDIO (TITAN_REGS_ESWITCH_BASE + 0x02000)
|
|
|
#define TITAN_REGS_VLYNQ0 (AR7_REGS_BASE + 0x1c00)
|
|
|
#define TITAN_REGS_VLYNQ1 (AR7_REGS_BASE + 0x1300)
|
|
|
|