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+--- a/arch/arm/boot/dts/Makefile 2015-09-22 18:30:09.033530282 +0530
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++++ b/arch/arm/boot/dts/Makefile 2015-09-23 17:06:44.892947581 +0530
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+@@ -362,6 +362,7 @@
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+ qcom-ipq8064-ap148.dtb \
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+ qcom-ipq8064-db149.dtb \
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+ qcom-ipq8064-r7500.dtb \
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++ qcom-ipq8064-d7800.dtb \
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+ qcom-msm8660-surf.dtb \
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+ qcom-msm8960-cdp.dtb \
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+ qcom-msm8974-sony-xperia-honami.dtb
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+--- a/arch/arm/boot/dts/qcom-ipq8064-d7800.dts 1970-01-01 05:30:00.000000000 +0530
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++++ b/arch/arm/boot/dts/qcom-ipq8064-d7800.dts 2015-09-23 17:06:45.336947567 +0530
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+@@ -0,0 +1,368 @@
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++#include "qcom-ipq8064-v1.0.dtsi"
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++
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++#include <dt-bindings/input/input.h>
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++
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++/ {
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++ model = "Netgear Nighthawk X4 D7800";
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++ compatible = "netgear,d7800", "qcom,ipq8064";
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++
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++ memory@0 {
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++ reg = <0x42000000 0xe000000>;
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++ device_type = "memory";
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++ };
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++
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++ reserved-memory {
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++ #address-cells = <1>;
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++ #size-cells = <1>;
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++ ranges;
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++ rsvd@41200000 {
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++ reg = <0x41200000 0x300000>;
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++ no-map;
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++ };
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++ };
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++
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++ aliases {
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++ serial0 = &uart4;
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++ mdio-gpio0 = &mdio0;
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++ };
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++
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++ chosen {
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++ bootargs = "rootfstype=squashfs noinitrd";
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++ linux,stdout-path = "serial0:115200n8";
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++ };
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++
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++ soc {
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++ pinmux@800000 {
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++ i2c4_pins: i2c4_pinmux {
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++ pins = "gpio12", "gpio13";
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++ function = "gsbi4";
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++ bias-disable;
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++ };
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++
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++ pcie0_pins: pcie0_pinmux {
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++ mux {
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++ pins = "gpio3";
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++ function = "pcie1_rst";
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++ drive-strength = <12>;
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++ bias-disable;
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++ };
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++ };
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++
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++ pcie1_pins: pcie1_pinmux {
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++ mux {
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++ pins = "gpio48";
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++ function = "pcie2_rst";
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++ drive-strength = <12>;
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++ bias-disable;
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++ };
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++ };
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++
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++ nand_pins: nand_pins {
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++ mux {
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++ pins = "gpio34", "gpio35", "gpio36",
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++ "gpio37", "gpio38", "gpio39",
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++ "gpio40", "gpio41", "gpio42",
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++ "gpio43", "gpio44", "gpio45",
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++ "gpio46", "gpio47";
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++ function = "nand";
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++ drive-strength = <10>;
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++ bias-disable;
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++ };
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++ pullups {
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++ pins = "gpio39";
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++ bias-pull-up;
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++ };
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++ hold {
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++ pins = "gpio40", "gpio41", "gpio42",
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++ "gpio43", "gpio44", "gpio45",
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++ "gpio46", "gpio47";
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++ bias-bus-hold;
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++ };
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++ };
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++
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++ mdio0_pins: mdio0_pins {
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++ mux {
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++ pins = "gpio0", "gpio1";
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++ function = "gpio";
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++ drive-strength = <8>;
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++ bias-disable;
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++ };
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++ };
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++
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++ rgmii2_pins: rgmii2_pins {
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++ mux {
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++ pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
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++ "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
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++ function = "rgmii2";
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++ drive-strength = <8>;
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++ bias-disable;
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++ };
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++ };
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++ };
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++
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++ gsbi@16300000 {
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++ qcom,mode = <GSBI_PROT_I2C_UART>;
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++ status = "ok";
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++ serial@16340000 {
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++ status = "ok";
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++ };
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++ /*
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++ * The i2c device on gsbi4 should not be enabled.
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++ * On ipq806x designs gsbi4 i2c is meant for exclusive
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++ * RPM usage. Turning this on in kernel manifests as
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++ * i2c failure for the RPM.
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++ */
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++ };
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++
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++ sata-phy@1b400000 {
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++ status = "ok";
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++ };
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++
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++ sata@29000000 {
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++ status = "ok";
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++ };
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++
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++ phy@100f8800 { /* USB3 port 1 HS phy */
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++ status = "ok";
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++ };
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++
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++ phy@100f8830 { /* USB3 port 1 SS phy */
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++ status = "ok";
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++ };
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++
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++ phy@110f8800 { /* USB3 port 0 HS phy */
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++ status = "ok";
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++ };
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++
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++ phy@110f8830 { /* USB3 port 0 SS phy */
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++ status = "ok";
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++ };
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++
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++ usb30@0 {
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++ status = "ok";
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++ };
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++
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++ usb30@1 {
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++ status = "ok";
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++ };
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++
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++ pcie0: pci@1b500000 {
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++ status = "ok";
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++ reset-gpio = <&qcom_pinmux 3 0>;
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++ pinctrl-0 = <&pcie0_pins>;
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++ pinctrl-names = "default";
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++ };
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++
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++ pcie1: pci@1b700000 {
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++ status = "ok";
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++ reset-gpio = <&qcom_pinmux 48 0>;
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++ pinctrl-0 = <&pcie1_pins>;
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++ pinctrl-names = "default";
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++ };
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++
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++ nand@1ac00000 {
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++ status = "ok";
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++
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++ pinctrl-0 = <&nand_pins>;
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++ pinctrl-names = "default";
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++
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++ nand-ecc-strength = <4>;
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++ nand-bus-width = <8>;
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++
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++ #address-cells = <1>;
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++ #size-cells = <1>;
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++
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++ qcadata@0 {
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++ label = "qcadata";
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++ reg = <0x0000000 0x0c80000>;
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++ read-only;
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++ };
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++
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++ APPSBL@c80000 {
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++ label = "APPSBL";
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++ reg = <0x0c80000 0x0500000>;
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++ read-only;
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++ };
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++
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++ APPSBLENV@1180000 {
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++ label = "APPSBLENV";
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++ reg = <0x1180000 0x0080000>;
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++ read-only;
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++ };
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++
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++ art: art@1200000 {
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++ label = "art";
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++ reg = <0x1200000 0x0140000>;
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++ read-only;
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++ };
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++
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++ artbak: art@1340000 {
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++ label = "artbak";
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++ reg = <0x1340000 0x0140000>;
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++ read-only;
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++ };
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++
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++ kernel@1480000 {
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++ label = "kernel";
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++ reg = <0x1480000 0x0200000>;
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++ };
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++
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++ ubi@1680000 {
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++ label = "ubi";
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++ reg = <0x1680000 0x1E00000>;
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++ };
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++
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++ netgear@3480000 {
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++ label = "netgear";
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++ reg = <0x3480000 0x4480000>;
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++ read-only;
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++ };
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++
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++ reserve@7900000 {
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++ label = "reserve";
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++ reg = <0x7900000 0x0700000>;
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++ read-only;
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++ };
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++
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++ firmware@1480000 {
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++ label = "firmware";
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++ reg = <0x1480000 0x2000000>;
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++ };
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++
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++ };
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++
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++ mdio0: mdio {
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++ compatible = "virtual,mdio-gpio";
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++ #address-cells = <1>;
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++ #size-cells = <0>;
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++ gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
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++ pinctrl-0 = <&mdio0_pins>;
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++ pinctrl-names = "default";
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++
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++ phy0: ethernet-phy@0 {
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++ device_type = "ethernet-phy";
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++ reg = <0>;
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++ qca,ar8327-initvals = <
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++ 0x00004 0x7600000 /* PAD0_MODE */
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++ 0x00008 0x1000000 /* PAD5_MODE */
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++ 0x0000c 0x80 /* PAD6_MODE */
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++ 0x000e4 0xaa545 /* MAC_POWER_SEL */
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++ 0x000e0 0xc74164de /* SGMII_CTRL */
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++ 0x0007c 0x4e /* PORT0_STATUS */
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++ 0x00094 0x4e /* PORT6_STATUS */
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++ >;
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++ };
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++
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++ phy4: ethernet-phy@4 {
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++ device_type = "ethernet-phy";
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++ reg = <4>;
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++ };
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++ };
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++
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++ gmac1: ethernet@37200000 {
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++ status = "ok";
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++ phy-mode = "rgmii";
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++ phy-handle = <&phy4>;
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++ qcom,id = <1>;
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++
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++ pinctrl-0 = <&rgmii2_pins>;
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++ pinctrl-names = "default";
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++
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++ mtd-mac-address = <&art 6>;
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++ };
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++
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++ gmac2: ethernet@37400000 {
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++ status = "ok";
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++ phy-mode = "sgmii";
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++ qcom,id = <2>;
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++
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++ mtd-mac-address = <&art 0>;
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++
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++ fixed-link {
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++ speed = <1000>;
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++ full-duplex;
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++ };
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++ };
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++ };
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++
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++ gpio-keys {
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++ compatible = "gpio-keys";
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++
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++ wifi {
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++ label = "wifi";
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++ gpios = <&qcom_pinmux 6 1>;
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++ linux,code = <KEY_WLAN>;
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++ };
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++
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++ reset {
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++ label = "reset";
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++ gpios = <&qcom_pinmux 54 1>;
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++ linux,code = <KEY_RESTART>;
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++ };
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++
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++ wps {
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++ label = "wps";
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++ gpios = <&qcom_pinmux 65 1>;
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++ linux,code = <KEY_WPS_BUTTON>;
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++ };
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++ };
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++
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++ gpio-leds {
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++ compatible = "gpio-leds";
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++
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++ usb1 {
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++ label = "d7800:amber:usb1";
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++ gpios = <&qcom_pinmux 7 0>;
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++ };
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++
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++ usb3 {
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++ label = "d7800:amber:usb3";
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++ gpios = <&qcom_pinmux 8 0>;
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++ };
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++
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++ status {
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++ label = "d7800:amber:status";
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++ gpios = <&qcom_pinmux 9 0>;
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++ };
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++
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++ internet {
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++ label = "d7800:white:internet";
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++ gpios = <&qcom_pinmux 22 0>;
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++ };
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++
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++ wan {
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++ label = "d7800:white:wan";
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++ gpios = <&qcom_pinmux 23 0>;
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++ };
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++
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++ wps {
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++ label = "d7800:white:wps";
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++ gpios = <&qcom_pinmux 24 0>;
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++ };
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++
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++ esata {
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++ label = "d7800:white:esata";
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++ gpios = <&qcom_pinmux 26 0>;
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++ };
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++
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++ power {
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++ label = "d7800:white:power";
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++ gpios = <&qcom_pinmux 53 0>;
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++ default-state = "on";
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++ };
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++
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++ rfkill {
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++ label = "d7800:white:rfkill";
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++ gpios = <&qcom_pinmux 64 0>;
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++ };
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++
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++ wifi5g {
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++ label = "d7800:white:wifi5g";
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++ gpios = <&qcom_pinmux 67 0>;
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++ };
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++ };
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++};
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++
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++&adm_dma {
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++ status = "ok";
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++};
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John Crispin