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realtek: arch: add early watchdog quirk

On some XikeStor switches (SKS8300-8X, SKS8300-12X), the SYS_LED/GPIO0 is
used to feed an external PT7A7514WE watchdog. While this was no issue on
SKS8300-8X, the bootloader on the SKS8300-12X seems to deactivate the
automatic feeding on purpose by setting the pin function of to GPIO0
instead of SYS_LED. This kills the periodic signal generated on that pin.
This causes the kernel to just stop quite early and reset the system
entirely.

Because this happens very early, it doesn't work to define this as a
pinctrl entry or GPIO hog. The drivers aren't even loaded at that stage.
To work around the issue, we need to configure this in the arch-specific
early setup. An affected device needs to have a corresponding node in
the DTS that is picked up then.

Signed-off-by: Jonas Jelonek <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/21922
Signed-off-by: Hauke Mehrtens <[email protected]>
Jonas Jelonek há 1 semana atrás
pai
commit
7f74364672

+ 3 - 0
target/linux/realtek/files-6.12/arch/mips/include/asm/mach-rtl-otto/mach-rtl-otto.h

@@ -29,6 +29,9 @@
 #define RTL838X_INT_RW_CTRL		(0x0058)
 #define RTL838X_EXT_VERSION		(0x00D0)
 
+#define RTL931X_LED_GLB_CTRL		(0x0600)
+#define RTL931X_MAC_L2_GLOBAL_CTRL2	(0x1358)
+
 /* Definition of family IDs */
 #define RTL8380_FAMILY_ID		(0x8380)
 #define RTL8390_FAMILY_ID		(0x8390)

+ 17 - 0
target/linux/realtek/files-6.12/arch/mips/rtl-otto/prom.c

@@ -13,6 +13,7 @@
 #include <asm/mips-cps.h>
 #include <asm/prom.h>
 #include <asm/smp-ops.h>
+#include <linux/of.h>
 #include <linux/smp.h>
 
 #include <mach-rtl-otto.h>
@@ -103,6 +104,21 @@ static void __init apply_early_quirks(void)
 		sw_w32(0x3, RTL838X_INT_RW_CTRL);
 }
 
+static void __init apply_dts_quirks(void)
+{
+	struct device_node *node;
+
+	node = of_find_compatible_node(NULL, NULL, "diodes,pt7a75xx-wdt");
+	if (node) {
+		if (soc_info.family == RTL9310_FAMILY_ID) {
+			pr_info("apply quirk for diodes pt7a75xx watchdog\n");
+			sw_w32_mask(GENMASK(13, 12), BIT(12), RTL931X_LED_GLB_CTRL);
+			sw_w32_mask(0x0, BIT(8), RTL931X_MAC_L2_GLOBAL_CTRL2);
+		};
+		of_node_put(node);
+	}
+}
+
 void __init device_tree_init(void)
 {
 	if (!fdt_check_header(&__appended_dtb)) {
@@ -111,6 +127,7 @@ void __init device_tree_init(void)
 	}
 	initial_boot_params = (void *)fdt;
 	unflatten_and_copy_device_tree();
+	apply_dts_quirks();
 
 	/* delay cpc & smp probing to allow devicetree access */
 	mips_cpc_probe();