ar71xx: fix MII clock settings for various chips, improves ethernet stability on AR934x

SVN-Revision: 31925

target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c

@@ -199,17 +199,25 @@ void __init ath79_register_mdio(unsigned int id, u32 phy_mask)
 
 	switch (ath79_soc) {
 	case ATH79_SOC_AR7240:
+		mdio_data->is_ar7240 = 1;
+		/* fall through */
 	case ATH79_SOC_AR7241:
+		mdio_data->builtin_switch = 1;
+		break;
+
 	case ATH79_SOC_AR9330:
+		mdio_data->is_ar9330 = 1;
+		/* fall through */
 	case ATH79_SOC_AR9331:
-		mdio_data->is_ar7240 = 1;
+		mdio_data->builtin_switch = 1;
 		break;
 
 	case ATH79_SOC_AR9341:
 	case ATH79_SOC_AR9342:
 	case ATH79_SOC_AR9344:
 		if (id == 1)
-			mdio_data->is_ar7240 = 1;
+			mdio_data->builtin_switch = 1;
+		mdio_data->is_ar934x = 1;
 		break;
 
 	default:

target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h

@@ -49,7 +49,10 @@ struct ag71xx_platform_data {
 
 struct ag71xx_mdio_platform_data {
 	u32		phy_mask;
-	int		is_ar7240;
+	u8		builtin_switch:1;
+	u8		is_ar7240:1;
+	u8		is_ar9330:1;
+	u8		is_ar934x:1;
 };
 
 #endif /* __ASM_MACH_ATH79_PLATFORM_H */

target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h

@@ -322,6 +322,14 @@ static inline int ag71xx_desc_pktlen(struct ag71xx_desc *desc)
 #define MII_CFG_CLK_DIV_14	5
 #define MII_CFG_CLK_DIV_20	6
 #define MII_CFG_CLK_DIV_28	7
+#define MII_CFG_CLK_DIV_34	8
+#define MII_CFG_CLK_DIV_42	9
+#define MII_CFG_CLK_DIV_50	10
+#define MII_CFG_CLK_DIV_58	11
+#define MII_CFG_CLK_DIV_66	12
+#define MII_CFG_CLK_DIV_74	13
+#define MII_CFG_CLK_DIV_82	14
+#define MII_CFG_CLK_DIV_98	15
 #define MII_CFG_RESET		BIT(31)
 
 #define MII_CMD_WRITE		0x0

target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c

@@ -103,6 +103,12 @@ static int ag71xx_mdio_reset(struct mii_bus *bus)
 
 	if (am->pdata->is_ar7240)
 		t = MII_CFG_CLK_DIV_6;
+	else if (am->pdata->is_ar9330)
+		t = MII_CFG_CLK_DIV_98;
+	else if (am->pdata->builtin_switch && !am->pdata->is_ar934x)
+		t = MII_CFG_CLK_DIV_10;
+	else if (!am->pdata->builtin_switch && am->pdata->is_ar934x)
+		t = MII_CFG_CLK_DIV_58;
 	else
 		t = MII_CFG_CLK_DIV_28;
 
@@ -119,7 +125,7 @@ static int ag71xx_mdio_read(struct mii_bus *bus, int addr, int reg)
 {
 	struct ag71xx_mdio *am = bus->priv;
 
-	if (am->pdata->is_ar7240)
+	if (am->pdata->builtin_switch)
 		return ar7240sw_phy_read(bus, addr, reg);
 	else
 		return ag71xx_mdio_mii_read(am, addr, reg);
@@ -129,7 +135,7 @@ static int ag71xx_mdio_write(struct mii_bus *bus, int addr, int reg, u16 val)
 {
 	struct ag71xx_mdio *am = bus->priv;
 
-	if (am->pdata->is_ar7240)
+	if (am->pdata->builtin_switch)
 		ar7240sw_phy_write(bus, addr, reg, val);
 	else
 		ag71xx_mdio_mii_write(am, addr, reg, val);