uboot-mediatek: mtd: spinand: esmt: add support for F50L1G41LC

Add support for esmt F50L1G41LC flash chip. It is used in some recent
Cudy devices.

(cherry picked from commit c84025dea29602d149d22a86502d784f292441fe)
Link: https://github.com/openwrt/openwrt/pull/20963
Signed-off-by: Hauke Mehrtens <[email protected]>

package/boot/uboot-mediatek/patches/102-mtd-spinand-esmt-add-support-for-F50L1G41LC.patch

@@ -0,0 +1,68 @@
+Subject: [PATCH] mtd: spinand: esmt: add support for F50L1G41LC
+
+This adds support for ESMT F50L1G41LC, which appears to be an updated
+version of the already supported F50L1G41LB.
+Add esmt_8c SPI_NAND manufacturer to account for the newly used vendor
+ID with support for the ESMT F50L1G41LC chip.
+
+--- a/drivers/mtd/nand/spi/core.c
++++ b/drivers/mtd/nand/spi/core.c
+@@ -834,6 +834,7 @@ static const struct spinand_manufacturer
+ 	&toshiba_spinand_manufacturer,
+ 	&winbond_spinand_manufacturer,
+ 	&esmt_c8_spinand_manufacturer,
++	&esmt_8c_spinand_manufacturer,
+ 	&xtx_spinand_manufacturer,
+ };
+ 
+--- a/drivers/mtd/nand/spi/esmt.c
++++ b/drivers/mtd/nand/spi/esmt.c
+@@ -13,6 +13,7 @@
+ 
+ /* ESMT uses GigaDevice 0xc8 JECDEC ID on some SPI NANDs */
+ #define SPINAND_MFR_ESMT_C8			0xc8
++#define SPINAND_MFR_ESMT_8C			0x8c
+ 
+ static SPINAND_OP_VARIANTS(read_cache_variants,
+ 			   SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+@@ -104,6 +105,18 @@ static const struct mtd_ooblayout_ops f5
+ 	.rfree = f50l1g41lb_ooblayout_free,
+ };
+ 
++static const struct spinand_info esmt_8c_spinand_table[] = {
++	SPINAND_INFO("F50L1G41LC",
++		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x2C),
++		     NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
++		     NAND_ECCREQ(1, 512),
++		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
++					      &write_cache_variants,
++					      &update_cache_variants),
++		     0,
++		     SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)),
++};
++
+ static const struct spinand_info esmt_c8_spinand_table[] = {
+ 	SPINAND_INFO("F50L1G41LB",
+ 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x01),
+@@ -135,3 +148,11 @@ const struct spinand_manufacturer esmt_c
+ 	.nchips = ARRAY_SIZE(esmt_c8_spinand_table),
+ 	.ops = &esmt_spinand_manuf_ops,
+ };
++
++const struct spinand_manufacturer esmt_8c_spinand_manufacturer = {
++	.id = SPINAND_MFR_ESMT_8C,
++	.name = "ESMT",
++	.chips = esmt_8c_spinand_table,
++	.nchips = ARRAY_SIZE(esmt_8c_spinand_table),
++	.ops = &esmt_spinand_manuf_ops,
++};
+--- a/include/linux/mtd/spinand.h
++++ b/include/linux/mtd/spinand.h
+@@ -252,6 +252,7 @@ extern const struct spinand_manufacturer
+ extern const struct spinand_manufacturer toshiba_spinand_manufacturer;
+ extern const struct spinand_manufacturer winbond_spinand_manufacturer;
+ extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer;
++extern const struct spinand_manufacturer esmt_8c_spinand_manufacturer;
+ extern const struct spinand_manufacturer xtx_spinand_manufacturer;
+ 
+ /**

package/boot/uboot-mediatek/patches/457-initialized-the-watchdog-subsystem-later.patch

@@ -13,7 +13,7 @@ Signed-off-by: Enrico Mioso <[email protected]>
 
 --- a/common/board_r.c
 +++ b/common/board_r.c
-@@ -663,19 +663,13 @@ static init_fnc_t init_sequence_r[] = {
+@@ -651,19 +651,13 @@ static init_fnc_t init_sequence_r[] = {
  	serial_initialize,
  	initr_announce,
  	dm_announce,
@@ -33,7 +33,7 @@ Signed-off-by: Enrico Mioso <[email protected]>
  #if defined(CONFIG_PCI_INIT_R) && defined(CONFIG_SYS_EARLY_PCI_INIT)
  	/*
  	 * Do early PCI configuration _before_ the flash gets initialised,
-@@ -690,7 +684,6 @@ static init_fnc_t init_sequence_r[] = {
+@@ -678,7 +672,6 @@ static init_fnc_t init_sequence_r[] = {
  #ifdef CONFIG_MTD_NOR_FLASH
  	initr_flash,
  #endif
@@ -41,7 +41,7 @@ Signed-off-by: Enrico Mioso <[email protected]>
  #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_X86)
  	/* initialize higher level parts of CPU like time base and timers */
  	cpu_init_r,
-@@ -719,6 +712,10 @@ static init_fnc_t init_sequence_r[] = {
+@@ -707,6 +700,10 @@ static init_fnc_t init_sequence_r[] = {
  #ifdef CONFIG_PVBLOCK
  	initr_pvblock,
  #endif