ar71xx: add usb support for ubnt rocket m

SVN-Revision: 18598

target/linux/ar71xx/files/arch/mips/ar71xx/ar71xx.c

@@ -36,6 +36,7 @@ EXPORT_SYMBOL_GPL(ar71xx_usb_ctrl_base);
 void ar71xx_device_stop(u32 mask)
 {
 	unsigned long flags;
+	u32 mask_inv;
 	u32 t;
 
 	switch (ar71xx_soc) {
@@ -49,9 +50,12 @@ void ar71xx_device_stop(u32 mask)
 		break;
 
 	case AR71XX_SOC_AR7240:
+		mask_inv = mask & RESET_MODULE_USB_OHCI_DLL_7240;
 		local_irq_save(flags);
 		t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
-		ar71xx_reset_wr(AR724X_RESET_REG_RESET_MODULE, t | mask);
+		t |= mask;
+		t &= ~mask_inv;
+		ar71xx_reset_wr(AR724X_RESET_REG_RESET_MODULE, t);
 		local_irq_restore(flags);
 		break;
 
@@ -72,6 +76,7 @@ EXPORT_SYMBOL_GPL(ar71xx_device_stop);
 void ar71xx_device_start(u32 mask)
 {
 	unsigned long flags;
+	u32 mask_inv;
 	u32 t;
 
 	switch (ar71xx_soc) {
@@ -85,9 +90,12 @@ void ar71xx_device_start(u32 mask)
 		break;
 
 	case AR71XX_SOC_AR7240:
+		mask_inv = mask & RESET_MODULE_USB_OHCI_DLL_7240;
 		local_irq_save(flags);
 		t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
-		ar71xx_reset_wr(AR724X_RESET_REG_RESET_MODULE, t & ~mask);
+		t &= ~mask;
+		t |= mask_inv;
+		ar71xx_reset_wr(AR724X_RESET_REG_RESET_MODULE, t);
 		local_irq_restore(flags);
 		break;
 

target/linux/ar71xx/files/arch/mips/ar71xx/devices.c

@@ -42,6 +42,19 @@ static struct resource ar71xx_ohci_resources[] = {
 	},
 };
 
+static struct resource ar7240_ohci_resources[] = {
+	[0] = {
+		.start	= AR7240_OHCI_BASE,
+		.end	= AR7240_OHCI_BASE + AR7240_OHCI_SIZE - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= AR71XX_CPU_IRQ_USB,
+		.end	= AR71XX_CPU_IRQ_USB,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
 static u64 ar71xx_ohci_dmamask = DMA_BIT_MASK(32);
 static struct platform_device ar71xx_ohci_device = {
 	.name		= "ar71xx-ohci",
@@ -90,6 +103,9 @@ static struct platform_device ar71xx_ehci_device = {
 	(RESET_MODULE_USB_HOST | RESET_MODULE_USB_PHY \
 	| RESET_MODULE_USB_OHCI_DLL)
 
+#define AR7240_USB_RESET_MASK \
+	(RESET_MODULE_USB_HOST | RESET_MODULE_USB_OHCI_DLL_7240)
+
 static void __init ar71xx_usb_setup(void)
 {
 	ar71xx_device_stop(AR71XX_USB_RESET_MASK);
@@ -105,6 +121,18 @@ static void __init ar71xx_usb_setup(void)
 	mdelay(900);
 }
 
+static void __init ar7240_usb_setup(void)
+{
+	ar71xx_ohci_device.resource = ar7240_ohci_resources;
+
+	ar71xx_device_stop(AR7240_USB_RESET_MASK);
+	mdelay(1000);
+	ar71xx_device_start(AR7240_USB_RESET_MASK);
+
+	/* WAR for HW bug. Here it adjusts the duration between two SOFS */
+	ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x3);
+}
+
 static void __init ar91xx_usb_setup(void)
 {
 	ar71xx_device_stop(RESET_MODULE_USBSUS_OVERRIDE);
@@ -120,6 +148,11 @@ static void __init ar91xx_usb_setup(void)
 void __init ar71xx_add_device_usb(void)
 {
 	switch (ar71xx_soc) {
+	case AR71XX_SOC_AR7240:
+		ar7240_usb_setup();
+		platform_device_register(&ar71xx_ohci_device);
+		break;
+
 	case AR71XX_SOC_AR7130:
 	case AR71XX_SOC_AR7141:
 	case AR71XX_SOC_AR7161:

target/linux/ar71xx/files/arch/mips/ar71xx/mach-ubnt.c

@@ -308,8 +308,14 @@ static void __init ubnt_m_setup(void)
 					ubnt_m_gpio_buttons);
 }
 
+static void __init ubnt_rocket_m_setup(void)
+{
+	ubnt_m_setup();
+	ar71xx_add_device_usb();
+}
+
 MIPS_MACHINE(AR71XX_MACH_UBNT_BULLET_M, "Ubiquiti Bullet M", ubnt_m_setup);
-MIPS_MACHINE(AR71XX_MACH_UBNT_ROCKET_M, "Ubiquiti Rocket M", ubnt_m_setup);
+MIPS_MACHINE(AR71XX_MACH_UBNT_ROCKET_M, "Ubiquiti Rocket M", ubnt_rocket_m_setup);
 
 /* TODO detect the second ethernet port and use one
    init function for all Ubiquiti MIMO series products */

target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h

@@ -32,6 +32,8 @@
 #define AR71XX_EHCI_SIZE	0x01000000
 #define AR71XX_OHCI_BASE	0x1c000000
 #define AR71XX_OHCI_SIZE	0x01000000
+#define AR7240_OHCI_BASE	0x1b000000
+#define AR7240_OHCI_SIZE	0x01000000
 #define AR71XX_SPI_BASE		0x1f000000
 #define AR71XX_SPI_SIZE		0x01000000
 
@@ -468,6 +470,7 @@ static inline u32 ar724x_pci_rr(unsigned reg)
 #define RESET_MODULE_USB_OHCI_DLL	BIT(6)
 #define RESET_MODULE_USB_HOST		BIT(5)
 #define RESET_MODULE_USB_PHY		BIT(4)
+#define RESET_MODULE_USB_OHCI_DLL_7240	BIT(3)
 #define RESET_MODULE_PCI_BUS		BIT(1)
 #define RESET_MODULE_PCI_CORE		BIT(0)