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@@ -1,5 +1,8 @@
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-/* Driver for MagicBox 2.0 onboard CompactFlash adapter.
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+/*
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+ * Driver for MagicBox 2.0 onboard CompactFlash adapter.
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+ *
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* Written by Wojtek Kaniewski <[email protected]>
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+ * Copyright (C) 2008 Gabor Juhos <[email protected]>
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*
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* GNU General Public License.
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*/
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@@ -14,24 +17,27 @@
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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+#define UIC0_PR 0xc4
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+#define UIC0_TR 0xc5
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+#define MAGICBOX_CF_IRQ 25
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-#define UIC0_PR 0xc4
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-#define UIC0_TR 0xc5
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-#define IRQ 25
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-
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-static int ide_offsets[IDE_NR_PORTS] = {0, 2, 4, 6, 8, 10, 12, 14, -1, -1};
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+static u8 magicbox_ide_inb(unsigned long port)
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+{
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+ return (u8) (readw((void __iomem *) port) >> 8) & 0xff;
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+}
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-static u8 magicbox_ide_inb (unsigned long port)
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+static void magicbox_ide_outb(u8 value, unsigned long port)
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{
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- return (u8) (readw((void __iomem *) port) >> 8) & 255;
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+ writew(value << 8, (void __iomem *) port);
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}
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-static u16 magicbox_ide_inw (unsigned long port)
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+static void magicbox_ide_outbsync(ide_drive_t *drive, u8 value,
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+ unsigned long port)
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{
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- return (u16) readw((void __iomem *) port);
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+ writew(value << 8, (void __iomem *) port);
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}
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-static void magicbox_ide_insw (unsigned long port, void *addr, u32 count)
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+static inline void magicbox_ide_insw(unsigned long port, void *addr, u32 count)
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{
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u16 *ptr;
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@@ -39,12 +45,7 @@ static void magicbox_ide_insw (unsigned long port, void *addr, u32 count)
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*ptr = readw((void __iomem *) port);
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}
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-static u32 magicbox_ide_inl (unsigned long port)
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-{
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- return (u32) readl((void __iomem *) port);
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-}
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-
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-static void magicbox_ide_insl (unsigned long port, void *addr, u32 count)
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+static inline void magicbox_ide_insl(unsigned long port, void *addr, u32 count)
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{
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u32 *ptr;
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@@ -52,82 +53,229 @@ static void magicbox_ide_insl (unsigned long port, void *addr, u32 count)
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*ptr = readl((void __iomem *) port);
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}
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-static void magicbox_ide_outb (u8 value, unsigned long port)
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+static inline void magicbox_ide_outsw(unsigned long port, void *addr,
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+ u32 count)
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{
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- writew(value << 8, (void __iomem *) port);
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+ u16 *ptr;
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+
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+ for (ptr = addr; count--; ptr++)
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+ writew(*ptr, (void __iomem *) port);
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}
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-static void magicbox_ide_outbsync (ide_drive_t *drive, u8 value, unsigned long port)
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+static inline void magicbox_ide_outsl(unsigned long port, void *addr,
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+ u32 count)
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{
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- writew(value << 8, (void __iomem *) port);
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+ u32 *ptr;
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+
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+ for (ptr = addr; count--; ptr++)
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+ writel(*ptr, (void __iomem *) port);
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}
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-static void magicbox_ide_outw (u16 value, unsigned long port)
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+static void magicbox_ide_tf_load(ide_drive_t *drive, ide_task_t *task)
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{
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- writew(value, (void __iomem *) port);
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+ struct ide_io_ports *io_ports = &drive->hwif->io_ports;
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+ struct ide_taskfile *tf = &task->tf;
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+ u8 HIHI = (task->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF;
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+
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+ if (task->tf_flags & IDE_TFLAG_FLAGGED)
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+ HIHI = 0xFF;
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+
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+ ide_set_irq(drive, 1);
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+
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+ if (task->tf_flags & IDE_TFLAG_OUT_DATA)
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+ writel((tf->hob_data << 8) | tf->data,
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+ (void __iomem *) io_ports->data_addr);
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+
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+ if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE)
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+ magicbox_ide_outb(tf->hob_feature, io_ports->feature_addr);
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+ if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT)
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+ magicbox_ide_outb(tf->hob_nsect, io_ports->nsect_addr);
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+ if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL)
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+ magicbox_ide_outb(tf->hob_lbal, io_ports->lbal_addr);
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+ if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM)
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+ magicbox_ide_outb(tf->hob_lbam, io_ports->lbam_addr);
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+ if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH)
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+ magicbox_ide_outb(tf->hob_lbah, io_ports->lbah_addr);
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+
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+ if (task->tf_flags & IDE_TFLAG_OUT_FEATURE)
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+ magicbox_ide_outb(tf->feature, io_ports->feature_addr);
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+ if (task->tf_flags & IDE_TFLAG_OUT_NSECT)
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+ magicbox_ide_outb(tf->nsect, io_ports->nsect_addr);
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+ if (task->tf_flags & IDE_TFLAG_OUT_LBAL)
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+ magicbox_ide_outb(tf->lbal, io_ports->lbal_addr);
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+ if (task->tf_flags & IDE_TFLAG_OUT_LBAM)
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+ magicbox_ide_outb(tf->lbam, io_ports->lbam_addr);
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+ if (task->tf_flags & IDE_TFLAG_OUT_LBAH)
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+ magicbox_ide_outb(tf->lbah, io_ports->lbah_addr);
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+
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+ if (task->tf_flags & IDE_TFLAG_OUT_DEVICE)
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+ magicbox_ide_outb((tf->device & HIHI) | drive->select.all,
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+ io_ports->device_addr);
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}
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-static void magicbox_ide_outsw (unsigned long port, void *addr, u32 count)
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+static void magicbox_ide_tf_read(ide_drive_t *drive, ide_task_t *task)
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{
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- u16 *ptr;
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+ struct ide_io_ports *io_ports = &drive->hwif->io_ports;
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+ struct ide_taskfile *tf = &task->tf;
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- for (ptr = addr; count--; ptr++)
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- writew(*ptr, (void __iomem *) port);
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+ if (task->tf_flags & IDE_TFLAG_IN_DATA) {
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+ u16 data = (u16) readl((void __iomem *) io_ports->data_addr);
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+
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+ tf->data = data & 0xff;
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+ tf->hob_data = (data >> 8) & 0xff;
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+ }
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+
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+ /* be sure we're looking at the low order bits */
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+ magicbox_ide_outb(drive->ctl & ~0x80, io_ports->ctl_addr);
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+
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+ if (task->tf_flags & IDE_TFLAG_IN_NSECT)
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+ tf->nsect = magicbox_ide_inb(io_ports->nsect_addr);
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+ if (task->tf_flags & IDE_TFLAG_IN_LBAL)
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+ tf->lbal = magicbox_ide_inb(io_ports->lbal_addr);
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+ if (task->tf_flags & IDE_TFLAG_IN_LBAM)
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+ tf->lbam = magicbox_ide_inb(io_ports->lbam_addr);
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+ if (task->tf_flags & IDE_TFLAG_IN_LBAH)
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+ tf->lbah = magicbox_ide_inb(io_ports->lbah_addr);
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+ if (task->tf_flags & IDE_TFLAG_IN_DEVICE)
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+ tf->device = magicbox_ide_inb(io_ports->device_addr);
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+
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+ if (task->tf_flags & IDE_TFLAG_LBA48) {
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+ magicbox_ide_outb(drive->ctl | 0x80, io_ports->ctl_addr);
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+
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+ if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE)
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+ tf->hob_feature = magicbox_ide_inb(io_ports->feature_addr);
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+ if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT)
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+ tf->hob_nsect = magicbox_ide_inb(io_ports->nsect_addr);
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+ if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL)
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+ tf->hob_lbal = magicbox_ide_inb(io_ports->lbal_addr);
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+ if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM)
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+ tf->hob_lbam = magicbox_ide_inb(io_ports->lbam_addr);
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+ if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH)
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+ tf->hob_lbah = magicbox_ide_inb(io_ports->lbah_addr);
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+ }
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}
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-static void magicbox_ide_outl (u32 value, unsigned long port)
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+static void magicbox_ide_input_data(ide_drive_t *drive, struct request *rq,
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+ void *buf, unsigned int len)
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{
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- writel(value, (void __iomem *) port);
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+ unsigned long port = drive->hwif->io_ports.data_addr;
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+
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+ len++;
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+
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+ if (drive->io_32bit) {
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+ magicbox_ide_insl(port, buf, len / 4);
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+
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+ if ((len & 3) >= 2)
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+ magicbox_ide_insw(port, (u8 *)buf + (len & ~3), 1);
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+ } else
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+ magicbox_ide_insw(port, buf, len / 2);
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}
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-static void magicbox_ide_outsl (unsigned long port, void *addr, u32 count)
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+static void magicbox_ide_output_data(ide_drive_t *drive, struct request *rq,
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+ void *buf, unsigned int len)
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{
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- u32 *ptr;
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+ unsigned long port = drive->hwif->io_ports.data_addr;
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- for (ptr = addr; count--; ptr++)
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- writel(*ptr, (void __iomem *) port);
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+ len++;
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+
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+ if (drive->io_32bit) {
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+ magicbox_ide_outsl(port, buf, len / 4);
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+
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+ if ((len & 3) >= 2)
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+ magicbox_ide_outsw(port, (u8 *)buf + (len & ~3), 1);
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+ } else
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+ magicbox_ide_outsw(port, buf, len / 2);
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}
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+static void __init magicbox_ide_setup_hw(hw_regs_t *hw, u16 __iomem *base,
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+ u16 __iomem *ctrl, int irq)
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+{
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+ unsigned long port = (unsigned long) base;
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+ int i;
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-static void __init ide_magicbox_register(unsigned long addr,
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- unsigned long caddr, int irq)
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+ memset(hw, 0, sizeof(*hw));
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+ for (i = 0; i <= 7; i++)
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+ hw->io_ports_array[i] = port + i * 2;
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+
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+ /*
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+ * the IDE control register is at ATA address 6,
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+ * with CS1 active instead of CS0
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+ */
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+ hw->io_ports.ctl_addr = (unsigned long)ctrl + (6 * 2);
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+
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+ hw->irq = irq;
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+
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+ hw->chipset = ide_generic;
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+ hw->ack_intr = NULL;
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+}
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+
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+static int __init magibox_ide_probe(void)
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{
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hw_regs_t hw;
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ide_hwif_t *hwif;
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+ u16 __iomem *base;
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+ u16 __iomem *ctrl;
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+ u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
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+ int err;
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+
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+ /* Remap physical address space */
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+ base = ioremap_nocache(0xff100000, 4096);
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+ if (base == NULL) {
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+ err = -EBUSY;
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+ goto err_out;
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+ }
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- memset(&hw, 0, sizeof(hw));
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- ide_setup_ports(&hw, addr, ide_offsets, caddr + 12, 0, NULL,irq);
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-
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-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
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- if (ide_register_hw(&hw, &hwif) != -1)
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-#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
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- if (ide_register_hw(&hw, 1, &hwif) != -1)
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-#else
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- if (ide_register_hw(&hw, NULL, 1, &hwif) != -1)
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-#endif
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- {
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- printk(KERN_NOTICE "magicbox-ide: Registered IDE-CF driver\n");
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- hwif->mmio = 2;
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- hwif->drives[0].unmask = 1;
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- hwif->OUTB = magicbox_ide_outb;
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- hwif->OUTBSYNC = magicbox_ide_outbsync;
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- hwif->OUTW = magicbox_ide_outw;
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- hwif->OUTSW = magicbox_ide_outsw;
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- hwif->OUTSL = magicbox_ide_outsl;
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- hwif->INB = magicbox_ide_inb;
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- hwif->INW = magicbox_ide_inw;
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- hwif->INSW = magicbox_ide_insw;
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- hwif->INSL = magicbox_ide_insl;
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+ ctrl = ioremap_nocache(0xff200000, 4096);
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+ if (ctrl == NULL) {
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+ err = -EBUSY;
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+ goto err_unmap_base;
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}
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+
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+ magicbox_ide_setup_hw(&hw, base, ctrl, MAGICBOX_CF_IRQ);
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+
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+ hwif = ide_find_port();
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+ if (!hwif) {
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+ err = -ENODEV;
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+ goto err_unmap_ctrl;
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+ }
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+
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+ ide_init_port_data(hwif, hwif->index);
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+ ide_init_port_hw(hwif, &hw);
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+
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+ hwif->host_flags = IDE_HFLAG_MMIO;
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+
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+ hwif->tf_load = magicbox_ide_tf_load;
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+ hwif->tf_read = magicbox_ide_tf_read;
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+
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+ hwif->input_data = magicbox_ide_input_data;
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+ hwif->output_data = magicbox_ide_output_data;
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+
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+ hwif->drives[0].unmask = 1;
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+ hwif->OUTB = magicbox_ide_outb;
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+ hwif->OUTBSYNC = magicbox_ide_outbsync;
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+ hwif->INB = magicbox_ide_inb;
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+
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+ printk(KERN_INFO "ide%d: Magicbox CF interface\n", hwif->index);
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+
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+ idx[0] = hwif->index;
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+
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+ ide_device_add(idx, NULL);
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+
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+ return 0;
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+
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+err_unmap_ctrl:
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+ iounmap(ctrl);
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+err_unmap_base:
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+ iounmap(base);
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+err_out:
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+ return err;
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}
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-void __init ide_magicbox_init(void)
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+static int __init magicbox_ide_init(void)
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{
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- volatile u16 *addr;
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- volatile u16 *caddr;
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-
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/* Turn on PerWE instead of PCIsomething */
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- mtdcr(DCRN_CPC0_PCI_BASE, mfdcr(DCRN_CPC0_PCI_BASE) | (0x80000000L >> 27));
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+ mtdcr(DCRN_CPC0_PCI_BASE,
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+ mfdcr(DCRN_CPC0_PCI_BASE) | (0x80000000L >> 27));
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/* PerCS1 (CF's CS0): base 0xff100000, 16-bit, rw */
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mtdcr(DCRN_EBC_BASE, 1);
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@@ -141,14 +289,13 @@ void __init ide_magicbox_init(void)
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mtdcr(DCRN_EBC_BASE, 0x12);
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mtdcr(DCRN_EBC_BASE + 1, 0x080bd800);
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- /* Remap physical address space */
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- addr = ioremap_nocache(0xff100000, 4096);
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- caddr = ioremap_nocache(0xff200000, 4096);
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-
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/* Set interrupt to low-to-high-edge-triggered */
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- mtdcr(UIC0_TR, mfdcr(UIC0_TR) & ~(0x80000000L >> IRQ));
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- mtdcr(UIC0_PR, mfdcr(UIC0_PR) | (0x80000000L >> IRQ));
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+ mtdcr(UIC0_TR, mfdcr(UIC0_TR) & ~(0x80000000L >> MAGICBOX_CF_IRQ));
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+ mtdcr(UIC0_PR, mfdcr(UIC0_PR) | (0x80000000L >> MAGICBOX_CF_IRQ));
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- ide_magicbox_register((unsigned long)addr, (unsigned long)caddr, IRQ);
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+ return magibox_ide_probe();
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}
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+module_init(magicbox_ide_init);
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+
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+MODULE_LICENSE("GPL");
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