|
@@ -0,0 +1,39 @@
|
|
|
|
|
+--- a/drivers/net/wireless/ath/ath9k/hw.c
|
|
|
|
|
++++ b/drivers/net/wireless/ath/ath9k/hw.c
|
|
|
|
|
+@@ -1280,7 +1280,8 @@ int ath9k_hw_reset(struct ath_hw *ah, st
|
|
|
|
|
+ macStaId1 = REG_READ(ah, AR_STA_ID1) & AR_STA_ID1_BASE_RATE_11B;
|
|
|
|
|
+
|
|
|
|
|
+ /* For chips on which RTC reset is done, save TSF before it gets cleared */
|
|
|
|
|
+- if (AR_SREV_9280(ah) && ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL))
|
|
|
|
|
++ if (AR_SREV_9100(ah) ||
|
|
|
|
|
++ (AR_SREV_9280(ah) && ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL)))
|
|
|
|
|
+ tsf = ath9k_hw_gettsf64(ah);
|
|
|
|
|
+
|
|
|
|
|
+ saveLedState = REG_READ(ah, AR_CFG_LED) &
|
|
|
|
|
+@@ -1312,7 +1313,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st
|
|
|
|
|
+ }
|
|
|
|
|
+
|
|
|
|
|
+ /* Restore TSF */
|
|
|
|
|
+- if (tsf && AR_SREV_9280(ah) && ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL))
|
|
|
|
|
++ if (tsf)
|
|
|
|
|
+ ath9k_hw_settsf64(ah, tsf);
|
|
|
|
|
+
|
|
|
|
|
+ if (AR_SREV_9280_10_OR_LATER(ah))
|
|
|
|
|
+@@ -1325,6 +1326,17 @@ int ath9k_hw_reset(struct ath_hw *ah, st
|
|
|
|
|
+ if (r)
|
|
|
|
|
+ return r;
|
|
|
|
|
+
|
|
|
|
|
++ /*
|
|
|
|
|
++ * Some AR91xx SoC devices frequently fail to accept TSF writes
|
|
|
|
|
++ * right after the chip reset. When that happens, write a new
|
|
|
|
|
++ * value after the initvals have been applied, with an offset
|
|
|
|
|
++ * based on measured time differences
|
|
|
|
|
++ */
|
|
|
|
|
++ if (AR_SREV_9100(ah) && (ath9k_hw_gettsf64(ah) < tsf)) {
|
|
|
|
|
++ tsf += 1500;
|
|
|
|
|
++ ath9k_hw_settsf64(ah, tsf);
|
|
|
|
|
++ }
|
|
|
|
|
++
|
|
|
|
|
+ /* Setup MFP options for CCMP */
|
|
|
|
|
+ if (AR_SREV_9280_20_OR_LATER(ah)) {
|
|
|
|
|
+ /* Mask Retry(b11), PwrMgt(b12), MoreData(b13) to 0 in mgmt
|
Felix Fietkau