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@@ -1315,6 +1315,15 @@
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}
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static void ar9003_rx_gain_table_mode0(struct ath_hw *ah)
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+@@ -673,7 +704,7 @@ void ar9003_hw_attach_ops(struct ath_hw
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+ struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
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+ struct ath_hw_ops *ops = ath9k_hw_ops(ah);
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+
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+- priv_ops->init_mode_regs = ar9003_hw_init_mode_regs;
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++ ar9003_hw_init_mode_regs(ah);
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+ priv_ops->init_mode_gain_regs = ar9003_hw_init_mode_gain_regs;
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+
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+ ops->config_pci_powersave = ar9003_hw_configpcipowersave;
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--- a/drivers/net/wireless/ath/ath9k/ar9340_initvals.h
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+++ b/drivers/net/wireless/ath/ath9k/ar9340_initvals.h
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@@ -1172,6 +1172,106 @@ static const u32 ar9340Modes_mixed_ob_db
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@@ -1707,3 +1716,202 @@
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disable_40 = true;
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break;
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default:
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+--- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
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++++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
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+@@ -485,9 +485,7 @@ static int ar5008_hw_rf_alloc_ext_banks(
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+ ATH_ALLOC_BANK(ah->analogBank2Data, ah->iniBank2.ia_rows);
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+ ATH_ALLOC_BANK(ah->analogBank3Data, ah->iniBank3.ia_rows);
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+ ATH_ALLOC_BANK(ah->analogBank6Data, ah->iniBank6.ia_rows);
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+- ATH_ALLOC_BANK(ah->analogBank6TPCData, ah->iniBank6TPC.ia_rows);
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+ ATH_ALLOC_BANK(ah->analogBank7Data, ah->iniBank7.ia_rows);
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+- ATH_ALLOC_BANK(ah->bank6Temp, ah->iniBank6.ia_rows);
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+
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+ return 0;
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+ #undef ATH_ALLOC_BANK
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+@@ -517,6 +515,7 @@ static bool ar5008_hw_set_rf_regs(struct
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+ u32 ob5GHz = 0, db5GHz = 0;
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+ u32 ob2GHz = 0, db2GHz = 0;
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+ int regWrites = 0;
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++ int i;
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+
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+ /*
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+ * Software does not need to program bank data
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+@@ -541,13 +540,9 @@ static bool ar5008_hw_set_rf_regs(struct
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+ /* Setup Bank 6 Write */
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+ ar5008_rf_bank_setup(ah->analogBank3Data, &ah->iniBank3,
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+ modesIndex);
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+- {
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+- int i;
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+- for (i = 0; i < ah->iniBank6TPC.ia_rows; i++) {
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+- ah->analogBank6Data[i] =
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+- INI_RA(&ah->iniBank6TPC, i, modesIndex);
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+- }
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+- }
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++
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++ for (i = 0; i < ah->iniBank6.ia_rows; i++)
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++ ah->analogBank6Data[i] = INI_RA(&ah->iniBank6, i, modesIndex);
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+
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+ /* Only the 5 or 2 GHz OB/DB need to be set for a mode */
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+ if (eepMinorRev >= 2) {
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+@@ -572,18 +567,12 @@ static bool ar5008_hw_set_rf_regs(struct
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+ ar5008_rf_bank_setup(ah->analogBank7Data, &ah->iniBank7, 1);
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+
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+ /* Write Analog registers */
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+- REG_WRITE_RF_ARRAY(&ah->iniBank0, ah->analogBank0Data,
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+- regWrites);
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+- REG_WRITE_RF_ARRAY(&ah->iniBank1, ah->analogBank1Data,
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+- regWrites);
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+- REG_WRITE_RF_ARRAY(&ah->iniBank2, ah->analogBank2Data,
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+- regWrites);
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+- REG_WRITE_RF_ARRAY(&ah->iniBank3, ah->analogBank3Data,
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+- regWrites);
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+- REG_WRITE_RF_ARRAY(&ah->iniBank6TPC, ah->analogBank6Data,
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+- regWrites);
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+- REG_WRITE_RF_ARRAY(&ah->iniBank7, ah->analogBank7Data,
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+- regWrites);
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++ REG_WRITE_RF_ARRAY(&ah->iniBank0, ah->analogBank0Data, regWrites);
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++ REG_WRITE_RF_ARRAY(&ah->iniBank1, ah->analogBank1Data, regWrites);
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++ REG_WRITE_RF_ARRAY(&ah->iniBank2, ah->analogBank2Data, regWrites);
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++ REG_WRITE_RF_ARRAY(&ah->iniBank3, ah->analogBank3Data, regWrites);
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++ REG_WRITE_RF_ARRAY(&ah->iniBank6, ah->analogBank6Data, regWrites);
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++ REG_WRITE_RF_ARRAY(&ah->iniBank7, ah->analogBank7Data, regWrites);
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+
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+ return true;
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+ }
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+--- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c
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++++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
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+@@ -23,13 +23,13 @@
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+
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+ /* General hardware code for the A5008/AR9001/AR9002 hadware families */
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+
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+-static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
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++static int ar9002_hw_init_mode_regs(struct ath_hw *ah)
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+ {
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+ if (AR_SREV_9271(ah)) {
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+ INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271);
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+ INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271);
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+ INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg);
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+- return;
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++ return 0;
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+ }
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+
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+ if (ah->config.pcie_clock_req)
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+@@ -67,12 +67,10 @@ static void ar9002_hw_init_mode_regs(str
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+ } else if (AR_SREV_9100_OR_LATER(ah)) {
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+ INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9100);
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+ INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9100);
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+- INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6_9100);
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+ INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9100);
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+ } else {
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+ INIT_INI_ARRAY(&ah->iniModes, ar5416Modes);
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+ INIT_INI_ARRAY(&ah->iniCommon, ar5416Common);
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+- INIT_INI_ARRAY(&ah->iniBank6TPC, ar5416Bank6TPC);
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+ INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac);
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+ }
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+
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+@@ -86,14 +84,11 @@ static void ar9002_hw_init_mode_regs(str
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+ INIT_INI_ARRAY(&ah->iniBank3, ar5416Bank3);
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+ INIT_INI_ARRAY(&ah->iniBank7, ar5416Bank7);
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+
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+- /* Common for AR5416, AR9160 */
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+- if (!AR_SREV_9100(ah))
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+- INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6);
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+-
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+ /* Common for AR913x, AR9160 */
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+ if (!AR_SREV_5416(ah))
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+- INIT_INI_ARRAY(&ah->iniBank6TPC,
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+- ar5416Bank6TPC_9100);
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++ INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6TPC_9100);
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++ else
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++ INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6TPC);
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+ }
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+
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+ /* iniAddac needs to be modified for these chips */
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+@@ -104,7 +99,7 @@ static void ar9002_hw_init_mode_regs(str
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+
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+ data = devm_kzalloc(ah->dev, size, GFP_KERNEL);
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+ if (!data)
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+- return;
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++ return -ENOMEM;
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+
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+ memcpy(data, addac->ia_array, size);
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+ addac->ia_array = data;
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+@@ -120,6 +115,7 @@ static void ar9002_hw_init_mode_regs(str
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+ INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
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+ ar9287Common_japan_2484_cck_fir_coeff_9287_1_1);
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+ }
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++ return 0;
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+ }
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+
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+ static void ar9280_20_hw_init_rxgain_ini(struct ath_hw *ah)
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+@@ -415,7 +411,10 @@ int ar9002_hw_attach_ops(struct ath_hw *
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+ struct ath_hw_ops *ops = ath9k_hw_ops(ah);
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+ int ret;
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+
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+- priv_ops->init_mode_regs = ar9002_hw_init_mode_regs;
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++ ret = ar9002_hw_init_mode_regs(ah);
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++ if (ret)
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++ return ret;
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++
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+ priv_ops->init_mode_gain_regs = ar9002_hw_init_mode_gain_regs;
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+
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+ ops->config_pci_powersave = ar9002_hw_configpcipowersave;
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+--- a/drivers/net/wireless/ath/ath9k/hw.c
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++++ b/drivers/net/wireless/ath/ath9k/hw.c
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+@@ -54,11 +54,6 @@ static void ath9k_hw_init_cal_settings(s
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+ ath9k_hw_private_ops(ah)->init_cal_settings(ah);
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+ }
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+
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+-static void ath9k_hw_init_mode_regs(struct ath_hw *ah)
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+-{
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+- ath9k_hw_private_ops(ah)->init_mode_regs(ah);
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+-}
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+-
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+ static u32 ath9k_hw_compute_pll_control(struct ath_hw *ah,
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+ struct ath9k_channel *chan)
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+ {
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+@@ -670,8 +665,6 @@ static int __ath9k_hw_init(struct ath_hw
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+ if (!AR_SREV_9300_20_OR_LATER(ah))
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+ ah->ani_function &= ~ATH9K_ANI_MRC_CCK;
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+
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+- ath9k_hw_init_mode_regs(ah);
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+-
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+ if (!ah->is_pciexpress)
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+ ath9k_hw_disablepcie(ah);
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+
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+--- a/drivers/net/wireless/ath/ath9k/hw.h
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++++ b/drivers/net/wireless/ath/ath9k/hw.h
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+@@ -599,7 +599,6 @@ struct ath_hw_radar_conf {
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+ * @init_cal_settings: setup types of calibrations supported
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+ * @init_cal: starts actual calibration
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+ *
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+- * @init_mode_regs: Initializes mode registers
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+ * @init_mode_gain_regs: Initialize TX/RX gain registers
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+ *
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+ * @rf_set_freq: change frequency
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+@@ -618,7 +617,6 @@ struct ath_hw_private_ops {
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+ void (*init_cal_settings)(struct ath_hw *ah);
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+ bool (*init_cal)(struct ath_hw *ah, struct ath9k_channel *chan);
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+
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+- void (*init_mode_regs)(struct ath_hw *ah);
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+ void (*init_mode_gain_regs)(struct ath_hw *ah);
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+ void (*setup_calibration)(struct ath_hw *ah,
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+ struct ath9k_cal_list *currCal);
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+@@ -815,9 +813,7 @@ struct ath_hw {
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+ u32 *analogBank2Data;
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+ u32 *analogBank3Data;
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+ u32 *analogBank6Data;
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+- u32 *analogBank6TPCData;
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+ u32 *analogBank7Data;
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+- u32 *bank6Temp;
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+
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+ int coverage_class;
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+ u32 slottime;
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+@@ -858,7 +854,6 @@ struct ath_hw {
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+ struct ar5416IniArray iniBank2;
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+ struct ar5416IniArray iniBank3;
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+ struct ar5416IniArray iniBank6;
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+- struct ar5416IniArray iniBank6TPC;
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+ struct ar5416IniArray iniBank7;
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+ struct ar5416IniArray iniAddac;
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+ struct ar5416IniArray iniPcieSerdes;
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