group SYSDBG register defines in mcs814x.h

SVN-Revision: 32488

target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/clock.c

@@ -16,17 +16,6 @@
 
 #include <mach/mcs814x.h>
 
-/* System configuration registers offsets */
-#define SYSDBG_BS1	0x00
-#define SYSDBG_SYSCTL	0x08
-#define  SYSCTL_EMAC	(1 << 0)
-#define  SYSCTL_CIPHER	(1 << 16)
-#define SYSDBG_PLL_CTL	0x3C
-
-#define CPU_FREQ_SHIFT	27
-#define CPU_FREQ_MASK	0x0F
-#define SDRAM_FREQ_BIT	(1 << 22)
-
 #define KHZ	1000
 #define MHZ	(KHZ * KHZ)
 

target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/common.c

@@ -32,13 +32,6 @@ static struct map_desc mcs814x_io_desc[] __initdata = {
 	},
 };
 
-#define SYSDBG_BS2		0x04
-#define  LED_CFG_MASK		0x03
-#define  CPU_MODE_SHIFT		23
-#define  CPU_MODE_MASK		0x03
-
-#define SYSDBG_SYSCTL_MAC	0x1d
-
 struct cpu_mode {
 	const char *name;
 	int gpio_start;
@@ -96,9 +89,9 @@ static void mcs814x_eth_buffer_shifting_set(u8 value)
 
 	reg = __raw_readb(_CONFADDR_SYSDBG + SYSDBG_SYSCTL_MAC);
 	if (value)
-		reg |= 0x01;
+		reg |= BUF_SHIFT_BIT;
 	else
-		reg &= ~0x01;
+		reg &= ~BUF_SHIFT_BIT;
 	__raw_writeb(reg, _CONFADDR_SYSDBG + SYSDBG_SYSCTL_MAC);
 }
 

target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/mcs814x.h

@@ -30,5 +30,25 @@
 #define _CONFADDR_DBGLED  (_VIRT_CONFADDR + _CONFOFFSET_DBGLED)
 #define _CONFADDR_SYSDBG  (_VIRT_CONFADDR + _CONFOFFSET_SYSDBG)
 
+/* System configuration and bootstrap registers */
+#define SYSDBG_BS1		0x00
+#define  CPU_FREQ_SHIFT		27
+#define  CPU_FREQ_MASK		0x0F
+#define  SDRAM_FREQ_BIT		(1 << 22)
+
+#define SYSDBG_BS2		0x04
+#define  LED_CFG_MASK		0x03
+#define  CPU_MODE_SHIFT		23
+#define  CPU_MODE_MASK		0x03
+
+#define SYSDBG_SYSCTL_MAC	0x1d
+#define  BUF_SHIFT_BIT		(1 << 0)
+
+#define SYSDBG_SYSCTL		0x08
+#define  SYSCTL_EMAC		(1 << 0)
+#define  SYSCTL_CIPHER		(1 << 16)
+
+#define SYSDBG_PLL_CTL		0x3C
+
 #endif /* __ASM_ARCH_MCS814X_H */