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@@ -1,3 +1,34 @@
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+From fd576a3c594ee2356b50a0738403e5cef094935a Mon Sep 17 00:00:00 2001
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+From: Hauke Mehrtens <[email protected]>
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+Date: Sat, 9 Jun 2018 15:16:42 +0200
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+Subject: sun50i: h5: Add initial Orange Pi Zero Plus support
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+
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+Orange Pi Zero Plus is an open-source single-board computer
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+using the Allwinner H5 SOC.
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+
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+H5 Orangepi Zero Plus has
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+ - Quad-core Cortex-A53
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+ - 512MB DDR3
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+ - micrSD slot
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+ - 16MBit SPI Nor flash
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+ - Debug TTL UART
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+ - 1GBit/s Ethernet (RTL8211E)
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+ - Wifi (RTL8189FTV)
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+ - USB 2.0 Host
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+ - USB 2.0 OTG + power supply
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+
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+The device tree file is copied from the Linux kernel 4.18.
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+
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+Signed-off-by: Hauke Mehrtens <[email protected]>
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+---
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+ arch/arm/dts/Makefile | 1 +
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+ arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts | 145 ++++++++++++++++++++++++++
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+ board/sunxi/MAINTAINERS | 5 +
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+ configs/orangepi_zero_plus_defconfig | 16 +++
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+ 4 files changed, 167 insertions(+)
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+ create mode 100644 arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
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+ create mode 100644 configs/orangepi_zero_plus_defconfig
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+
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--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -372,6 +372,7 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \
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@@ -9,84 +40,36 @@
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sun50i-h5-orangepi-prime.dtb \
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sun50i-h5-orangepi-zero-plus2.dtb
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--- /dev/null
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-+++ b/configs/orangepi_zero_plus_defconfig
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-@@ -0,0 +1,19 @@
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-+CONFIG_ARM=y
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-+CONFIG_ARCH_SUNXI=y
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-+CONFIG_MACH_SUN50I_H5=y
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-+CONFIG_DRAM_CLK=624
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-+CONFIG_DRAM_ZQ=3881977
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-+CONFIG_MACPWR="PD6"
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-+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
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-+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus"
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-+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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-+CONFIG_SPL=y
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-+# CONFIG_CMD_IMLS is not set
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-+# CONFIG_CMD_FLASH is not set
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-+# CONFIG_CMD_FPGA is not set
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-+# CONFIG_SPL_DOS_PARTITION is not set
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-+# CONFIG_SPL_ISO_PARTITION is not set
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-+# CONFIG_SPL_EFI_PARTITION is not set
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-+CONFIG_SPL_SPI_SUNXI=y
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-+CONFIG_SUN8I_EMAC=y
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-+CONFIG_USB_EHCI_HCD=y
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---- /dev/null
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+++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
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-@@ -0,0 +1,113 @@
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+@@ -0,0 +1,145 @@
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+/*
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-+ * Copyright (C) 2017 Antony Antony <[email protected]>
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-+ * Copyright (c) 2016 ARM Ltd.
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-+ *
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-+ * This file is dual-licensed: you can use it either under the terms
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-+ * of the GPL or the X11 license, at your option. Note that this dual
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-+ * licensing only applies to this file, and not this project as a
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-+ * whole.
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-+ *
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-+ * a) This library is free software; you can redistribute it and/or
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-+ * modify it under the terms of the GNU General Public License as
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-+ * published by the Free Software Foundation; either version 2 of the
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-+ * License, or (at your option) any later version.
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-+ *
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-+ * This library is distributed in the hope that it will be useful,
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-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-+ * GNU General Public License for more details.
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-+ *
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-+ * Or, alternatively,
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++ * Copyright (C) 2016 ARM Ltd.
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++ * Copyright (C) 2018 Hauke Mehrtens <[email protected]>
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+ *
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-+ * b) Permission is hereby granted, free of charge, to any person
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-+ * obtaining a copy of this software and associated documentation
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-+ * files (the "Software"), to deal in the Software without
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-+ * restriction, including without limitation the rights to use,
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-+ * copy, modify, merge, publish, distribute, sublicense, and/or
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-+ * sell copies of the Software, and to permit persons to whom the
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-+ * Software is furnished to do so, subject to the following
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-+ * conditions:
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-+ *
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-+ * The above copyright notice and this permission notice shall be
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-+ * included in all copies or substantial portions of the Software.
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-+ *
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-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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-+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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-+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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-+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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-+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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-+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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-+ * OTHER DEALINGS IN THE SOFTWARE.
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++ * SPDX-License-Identifier: (GPL-2.0+ OR X11)
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+ */
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+
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+/dts-v1/;
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-+
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+#include "sun50i-h5.dtsi"
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+
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+#include <dt-bindings/gpio/gpio.h>
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++#include <dt-bindings/input/input.h>
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++#include <dt-bindings/pinctrl/sun4i-a10.h>
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+
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+/ {
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+ model = "Xunlong Orange Pi Zero Plus";
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-+ compatible = "xunlong,orangepizero-zero-plus", "allwinner,sun50i-h5";
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++ compatible = "xunlong,orangepi-zero-plus", "allwinner,sun50i-h5";
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++
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++ reg_vcc3v3: vcc3v3 {
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++ compatible = "regulator-fixed";
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++ regulator-name = "vcc3v3";
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++ regulator-min-microvolt = <3300000>;
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++ regulator-max-microvolt = <3300000>;
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++ };
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+
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+ aliases {
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++ ethernet0 = &emac;
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++ ethernet1 = &rtl8189ftv;
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+ serial0 = &uart0;
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+ };
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+
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@@ -94,42 +77,93 @@
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+ stdout-path = "serial0:115200n8";
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+ };
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+
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-+ memory {
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-+ reg = <0x40000000 0x40000000>;
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++ leds {
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++ compatible = "gpio-leds";
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++
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++ pwr {
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++ label = "orangepi:green:pwr";
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++ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
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++ default-state = "on";
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++ };
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++
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++ status {
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++ label = "orangepi:red:status";
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++ gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */
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++ };
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+ };
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+
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-+ reg_vcc3v3: vcc3v3 {
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++ reg_gmac_3v3: gmac-3v3 {
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+ compatible = "regulator-fixed";
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-+ regulator-name = "vcc3v3";
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++ regulator-name = "gmac-3v3";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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++ startup-delay-us = <100000>;
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++ enable-active-high;
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++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
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+ };
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+};
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+
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++&ehci0 {
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++ status = "okay";
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++};
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++
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+&ehci1 {
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+ status = "okay";
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+};
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+
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-+&mmc0 {
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-+ compatible = "allwinner,sun50i-h5-mmc",
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-+ "allwinner,sun50i-a64-mmc",
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-+ "allwinner,sun5i-a13-mmc";
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++&emac {
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+ pinctrl-names = "default";
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-+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
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++ pinctrl-0 = <&emac_rgmii_pins>;
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++ phy-supply = <®_gmac_3v3>;
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++ phy-handle = <&ext_rgmii_phy>;
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++ phy-mode = "rgmii";
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++ status = "okay";
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++};
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++
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++&external_mdio {
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++ ext_rgmii_phy: ethernet-phy@1 {
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++ compatible = "ethernet-phy-ieee802.3-c22";
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++ reg = <1>;
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++ };
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++};
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++
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++&mmc0 {
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+ vmmc-supply = <®_vcc3v3>;
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+ bus-width = <4>;
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-+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
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-+ cd-inverted;
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++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
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+ status = "okay";
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+};
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+
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-+&mmc2 {
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-+ pinctrl-names = "default";
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-+ pinctrl-0 = <&mmc2_8bit_pins>;
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++&mmc1 {
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+ vmmc-supply = <®_vcc3v3>;
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-+ bus-width = <8>;
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++ bus-width = <4>;
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+ non-removable;
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-+ cap-mmc-hw-reset;
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++ status = "okay";
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++
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++ /*
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++ * Explicitly define the sdio device, so that we can add an ethernet
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++ * alias for it (which e.g. makes u-boot set a mac-address).
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++ */
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++ rtl8189ftv: sdio_wifi@1 {
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++ reg = <1>;
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++ };
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++};
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++
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++/*
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++&spi0 {
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++ status = "okay";
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++
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++ flash@0 {
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++ #address-cells = <1>;
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++ #size-cells = <1>;
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++ compatible = "mxicy,mx25l1606e", "winbond,w25q128";
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++ reg = <0>;
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++ spi-max-frequency = <40000000>;
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++ };
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++};
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++*/
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++
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++&ohci0 {
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+ status = "okay";
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+};
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+
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@@ -143,6 +177,46 @@
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+ status = "okay";
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+};
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+
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++&usb_otg {
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++ dr_mode = "peripheral";
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++ status = "okay";
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++};
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++
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+&usbphy {
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++ /* USB Type-A ports' VBUS is always on */
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++ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
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+ status = "okay";
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+};
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+--- a/board/sunxi/MAINTAINERS
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++++ b/board/sunxi/MAINTAINERS
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+@@ -327,6 +327,11 @@ M: Icenowy Zheng <[email protected]>
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+ S: Maintained
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+ F: configs/orangepi_zero_defconfig
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+
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++ORANGEPI ZERO PLUS BOARD
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++M: Hauke Mehrtens <[email protected]>
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++S: Maintained
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++F: configs/orangepi_zero_plus_defconfig
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++
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+ ORANGEPI ZERO PLUS 2 BOARD
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+ M: Jagan Teki <[email protected]>
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+ S: Maintained
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+--- /dev/null
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++++ b/configs/orangepi_zero_plus_defconfig
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+@@ -0,0 +1,16 @@
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++CONFIG_ARM=y
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++CONFIG_ARCH_SUNXI=y
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++CONFIG_SPL=y
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++CONFIG_MACH_SUN50I_H5=y
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++CONFIG_DRAM_CLK=624
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++CONFIG_DRAM_ZQ=3881977
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++CONFIG_MMC0_CD_PIN="PH13"
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++CONFIG_MMC_SUNXI_SLOT_EXTRA=2
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++CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus"
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++# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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++# CONFIG_CMD_FLASH is not set
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++# CONFIG_SPL_DOS_PARTITION is not set
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++# CONFIG_SPL_EFI_PARTITION is not set
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++CONFIG_SUN8I_EMAC=y
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++CONFIG_USB_EHCI_HCD=y
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++CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
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Hauke Mehrtens