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@@ -22,7 +22,7 @@ Signed-off-by: Maxime Ripard <[email protected]>
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drivers/gpu/drm/vc4/vc4_drv.h | 7 ++-
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drivers/gpu/drm/vc4/vc4_gem.c | 24 +++++------
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drivers/gpu/drm/vc4/vc4_hdmi.c | 2 +-
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- drivers/gpu/drm/vc4/vc4_hvs.c | 50 ++++++++++++----------
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+ drivers/gpu/drm/vc4/vc4_hvs.c | 52 ++++++++++++----------
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drivers/gpu/drm/vc4/vc4_irq.c | 10 ++---
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drivers/gpu/drm/vc4/vc4_kms.c | 14 +++---
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drivers/gpu/drm/vc4/vc4_perfmon.c | 20 ++++-----
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@@ -31,7 +31,7 @@ Signed-off-by: Maxime Ripard <[email protected]>
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drivers/gpu/drm/vc4/vc4_v3d.c | 10 ++---
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drivers/gpu/drm/vc4/vc4_validate.c | 8 ++--
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drivers/gpu/drm/vc4/vc4_validate_shaders.c | 2 +-
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- 16 files changed, 126 insertions(+), 111 deletions(-)
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+ 16 files changed, 127 insertions(+), 112 deletions(-)
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--- a/drivers/gpu/drm/vc4/tests/vc4_mock.c
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+++ b/drivers/gpu/drm/vc4/tests/vc4_mock.c
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@@ -470,7 +470,7 @@ Signed-off-by: Maxime Ripard <[email protected]>
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switch (args->madv) {
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--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
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+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
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-@@ -2586,7 +2586,7 @@ static int vc4_hdmi_audio_prepare(struct
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+@@ -2590,7 +2590,7 @@ static int vc4_hdmi_audio_prepare(struct
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VC4_HDMI_AUDIO_PACKET_CEA_MASK);
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/* Set the MAI threshold */
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@@ -481,7 +481,16 @@ Signed-off-by: Maxime Ripard <[email protected]>
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VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICLOW) |
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--- a/drivers/gpu/drm/vc4/vc4_hvs.c
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+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
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-@@ -416,7 +416,7 @@ static void vc4_hvs_irq_enable_eof(const
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+@@ -303,7 +303,7 @@ static void vc4_hvs_lut_load(struct vc4_
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+ if (!drm_dev_enter(drm, &idx))
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+ return;
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+
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+- if (hvs->vc4->is_vc5)
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++ if (hvs->vc4->gen == VC4_GEN_5)
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+ return;
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+
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+ /* The LUT memory is laid out with each HVS channel in order,
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+@@ -421,7 +421,7 @@ static void vc4_hvs_irq_enable_eof(const
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unsigned int channel)
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{
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struct vc4_dev *vc4 = hvs->vc4;
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@@ -490,7 +499,7 @@ Signed-off-by: Maxime Ripard <[email protected]>
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SCALER5_DISPCTRL_DSPEIEOF(channel) :
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SCALER_DISPCTRL_DSPEIEOF(channel);
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-@@ -428,7 +428,7 @@ static void vc4_hvs_irq_clear_eof(const
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+@@ -433,7 +433,7 @@ static void vc4_hvs_irq_clear_eof(const
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unsigned int channel)
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{
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struct vc4_dev *vc4 = hvs->vc4;
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@@ -499,7 +508,7 @@ Signed-off-by: Maxime Ripard <[email protected]>
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SCALER5_DISPCTRL_DSPEIEOF(channel) :
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SCALER_DISPCTRL_DSPEIEOF(channel);
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-@@ -620,7 +620,7 @@ int vc4_hvs_get_fifo_from_output(struct
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+@@ -625,7 +625,7 @@ int vc4_hvs_get_fifo_from_output(struct
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u32 reg;
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int ret;
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@@ -508,7 +517,7 @@ Signed-off-by: Maxime Ripard <[email protected]>
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return output;
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/*
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-@@ -701,7 +701,7 @@ static int vc4_hvs_init_channel(struct v
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+@@ -706,7 +706,7 @@ static int vc4_hvs_init_channel(struct v
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dispctrl = SCALER_DISPCTRLX_ENABLE;
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dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(chan));
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@@ -517,7 +526,7 @@ Signed-off-by: Maxime Ripard <[email protected]>
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dispctrl |= VC4_SET_FIELD(mode->hdisplay,
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SCALER_DISPCTRLX_WIDTH) |
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VC4_SET_FIELD(mode->vdisplay,
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-@@ -732,7 +732,7 @@ static int vc4_hvs_init_channel(struct v
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+@@ -737,7 +737,7 @@ static int vc4_hvs_init_channel(struct v
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/* Reload the LUT, since the SRAMs would have been disabled if
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* all CRTCs had SCALER_DISPBKGND_GAMMA unset at once.
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*/
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@@ -526,7 +535,7 @@ Signed-off-by: Maxime Ripard <[email protected]>
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vc4_hvs_lut_load(hvs, vc4_crtc);
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else
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vc5_hvs_lut_load(hvs, vc4_crtc);
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-@@ -782,7 +782,7 @@ static int vc4_hvs_gamma_check(struct dr
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+@@ -785,7 +785,7 @@ static int vc4_hvs_gamma_check(struct dr
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struct drm_device *dev = crtc->dev;
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struct vc4_dev *vc4 = to_vc4_dev(dev);
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@@ -535,7 +544,7 @@ Signed-off-by: Maxime Ripard <[email protected]>
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return 0;
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if (!crtc_state->color_mgmt_changed)
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-@@ -1036,7 +1036,7 @@ void vc4_hvs_atomic_flush(struct drm_crt
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+@@ -1039,7 +1039,7 @@ void vc4_hvs_atomic_flush(struct drm_crt
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u32 dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(channel));
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if (crtc->state->gamma_lut) {
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@@ -544,7 +553,7 @@ Signed-off-by: Maxime Ripard <[email protected]>
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vc4_hvs_update_gamma_lut(hvs, vc4_crtc);
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dispbkgndx |= SCALER_DISPBKGND_GAMMA;
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} else {
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-@@ -1053,7 +1053,7 @@ void vc4_hvs_atomic_flush(struct drm_crt
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+@@ -1056,7 +1056,7 @@ void vc4_hvs_atomic_flush(struct drm_crt
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* should already be disabling/enabling the pipeline
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* when gamma changes.
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*/
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@@ -553,7 +562,7 @@ Signed-off-by: Maxime Ripard <[email protected]>
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dispbkgndx &= ~SCALER_DISPBKGND_GAMMA;
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}
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HVS_WRITE(SCALER_DISPBKGNDX(channel), dispbkgndx);
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-@@ -1069,7 +1069,8 @@ void vc4_hvs_atomic_flush(struct drm_crt
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+@@ -1073,7 +1073,8 @@ exit:
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void vc4_hvs_mask_underrun(struct vc4_hvs *hvs, int channel)
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{
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@@ -563,7 +572,7 @@ Signed-off-by: Maxime Ripard <[email protected]>
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u32 dispctrl;
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int idx;
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-@@ -1077,8 +1078,9 @@ void vc4_hvs_mask_underrun(struct vc4_hv
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+@@ -1081,8 +1082,9 @@ void vc4_hvs_mask_underrun(struct vc4_hv
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return;
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dispctrl = HVS_READ(SCALER_DISPCTRL);
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@@ -575,7 +584,7 @@ Signed-off-by: Maxime Ripard <[email protected]>
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HVS_WRITE(SCALER_DISPCTRL, dispctrl);
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-@@ -1087,7 +1089,8 @@ void vc4_hvs_mask_underrun(struct vc4_hv
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+@@ -1091,7 +1093,8 @@ void vc4_hvs_mask_underrun(struct vc4_hv
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void vc4_hvs_unmask_underrun(struct vc4_hvs *hvs, int channel)
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{
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@@ -585,7 +594,7 @@ Signed-off-by: Maxime Ripard <[email protected]>
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u32 dispctrl;
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int idx;
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-@@ -1095,8 +1098,9 @@ void vc4_hvs_unmask_underrun(struct vc4_
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+@@ -1099,8 +1102,9 @@ void vc4_hvs_unmask_underrun(struct vc4_
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return;
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dispctrl = HVS_READ(SCALER_DISPCTRL);
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@@ -597,7 +606,7 @@ Signed-off-by: Maxime Ripard <[email protected]>
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HVS_WRITE(SCALER_DISPSTAT,
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SCALER_DISPSTAT_EUFLOW(channel));
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-@@ -1139,8 +1143,10 @@ static irqreturn_t vc4_hvs_irq_handler(i
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+@@ -1143,8 +1147,10 @@ static irqreturn_t vc4_hvs_irq_handler(i
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control = HVS_READ(SCALER_DISPCTRL);
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for (channel = 0; channel < SCALER_CHANNELS_COUNT; channel++) {
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@@ -610,7 +619,7 @@ Signed-off-by: Maxime Ripard <[email protected]>
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/* Interrupt masking is not always honored, so check it here. */
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if (status & SCALER_DISPSTAT_EUFLOW(channel) &&
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control & dspeislur) {
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-@@ -1176,7 +1182,7 @@ int vc4_hvs_debugfs_init(struct drm_mino
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+@@ -1180,7 +1186,7 @@ int vc4_hvs_debugfs_init(struct drm_mino
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if (!vc4->hvs)
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return -ENODEV;
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@@ -619,7 +628,7 @@ Signed-off-by: Maxime Ripard <[email protected]>
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debugfs_create_bool("hvs_load_tracker", S_IRUGO | S_IWUSR,
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minor->debugfs_root,
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&vc4->load_tracker_enabled);
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-@@ -1225,7 +1231,7 @@ struct vc4_hvs *__vc4_hvs_alloc(struct v
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+@@ -1230,7 +1236,7 @@ struct vc4_hvs *__vc4_hvs_alloc(struct v
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* between planes when they don't overlap on the screen, but
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* for now we just allocate globally.
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*/
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@@ -628,7 +637,7 @@ Signed-off-by: Maxime Ripard <[email protected]>
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/* 48k words of 2x12-bit pixels */
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drm_mm_init(&hvs->lbm_mm, 0, 48 * 1024);
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else
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-@@ -1259,7 +1265,7 @@ static int vc4_hvs_bind(struct device *d
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+@@ -1264,7 +1270,7 @@ static int vc4_hvs_bind(struct device *d
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hvs->regset.regs = hvs_regs;
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hvs->regset.nregs = ARRAY_SIZE(hvs_regs);
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@@ -637,7 +646,7 @@ Signed-off-by: Maxime Ripard <[email protected]>
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struct rpi_firmware *firmware;
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struct device_node *node;
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unsigned int max_rate;
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-@@ -1297,7 +1303,7 @@ static int vc4_hvs_bind(struct device *d
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+@@ -1302,7 +1308,7 @@ static int vc4_hvs_bind(struct device *d
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}
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}
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@@ -646,7 +655,7 @@ Signed-off-by: Maxime Ripard <[email protected]>
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hvs->dlist = hvs->regs + SCALER_DLIST_START;
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else
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hvs->dlist = hvs->regs + SCALER5_DLIST_START;
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-@@ -1338,7 +1344,7 @@ static int vc4_hvs_bind(struct device *d
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+@@ -1343,7 +1349,7 @@ static int vc4_hvs_bind(struct device *d
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SCALER_DISPCTRL_DISPEIRQ(1) |
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SCALER_DISPCTRL_DISPEIRQ(2);
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@@ -655,7 +664,7 @@ Signed-off-by: Maxime Ripard <[email protected]>
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dispctrl &= ~(SCALER_DISPCTRL_DMAEIRQ |
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SCALER_DISPCTRL_SLVWREIRQ |
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SCALER_DISPCTRL_SLVRDEIRQ |
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-@@ -1393,7 +1399,7 @@ static int vc4_hvs_bind(struct device *d
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+@@ -1398,7 +1404,7 @@ static int vc4_hvs_bind(struct device *d
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/* Recompute Composite Output Buffer (COB) allocations for the displays
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*/
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