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@@ -1797,6 +1797,33 @@ ar8xxx_sw_set_flush_port_arl_table(struct switch_dev *dev,
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return ret;
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}
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+int
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+ar8xxx_sw_get_port_stats(struct switch_dev *dev, int port,
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+ struct switch_port_stats *stats)
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+{
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+ struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
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+ u64 *mib_stats;
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+
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+ if (!ar8xxx_has_mib_counters(priv))
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+ return -EOPNOTSUPP;
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+
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+ if (!(priv->chip->mib_rxb_id || priv->chip->mib_txb_id))
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+ return -EOPNOTSUPP;
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+
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+ if (port >= dev->ports)
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+ return -EINVAL;
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+
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+ mutex_lock(&priv->mib_lock);
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+
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+ mib_stats = &priv->mib_stats[port * priv->chip->num_mibs];
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+
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+ stats->tx_bytes = mib_stats[priv->chip->mib_txb_id];
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+ stats->rx_bytes = mib_stats[priv->chip->mib_rxb_id];
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+
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+ mutex_unlock(&priv->mib_lock);
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+ return 0;
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+}
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+
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static int
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ar8xxx_phy_read(struct mii_bus *bus, int phy_addr, int reg_addr)
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{
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@@ -1927,16 +1954,7 @@ static const struct switch_dev_ops ar8xxx_sw_ops = {
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.apply_config = ar8xxx_sw_hw_apply,
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.reset_switch = ar8xxx_sw_reset_switch,
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.get_port_link = ar8xxx_sw_get_port_link,
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-/* The following op is disabled as it hogs the CPU and degrades performance.
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- An implementation has been attempted in 4d8a66d but reading MIB data is slow
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- on ar8xxx switches.
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-
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- The high CPU load has been traced down to the ar8xxx_reg_wait() call in
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- ar8xxx_mib_op(), which has to usleep_range() till the MIB busy flag set by
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- the request to update the MIB counter is cleared. */
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-#if 0
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.get_port_stats = ar8xxx_sw_get_port_stats,
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-#endif
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};
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static const struct ar8xxx_chip ar7240sw_chip = {
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@@ -1968,7 +1986,9 @@ static const struct ar8xxx_chip ar7240sw_chip = {
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.num_mibs = ARRAY_SIZE(ar8236_mibs),
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.mib_decs = ar8236_mibs,
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- .mib_func = AR8216_REG_MIB_FUNC
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+ .mib_func = AR8216_REG_MIB_FUNC,
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+ .mib_rxb_id = AR8236_MIB_RXB_ID,
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+ .mib_txb_id = AR8236_MIB_TXB_ID,
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};
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static const struct ar8xxx_chip ar8216_chip = {
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@@ -1998,7 +2018,9 @@ static const struct ar8xxx_chip ar8216_chip = {
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.num_mibs = ARRAY_SIZE(ar8216_mibs),
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.mib_decs = ar8216_mibs,
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- .mib_func = AR8216_REG_MIB_FUNC
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+ .mib_func = AR8216_REG_MIB_FUNC,
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+ .mib_rxb_id = AR8216_MIB_RXB_ID,
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+ .mib_txb_id = AR8216_MIB_TXB_ID,
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};
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static const struct ar8xxx_chip ar8229_chip = {
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@@ -2030,7 +2052,9 @@ static const struct ar8xxx_chip ar8229_chip = {
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.num_mibs = ARRAY_SIZE(ar8236_mibs),
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.mib_decs = ar8236_mibs,
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- .mib_func = AR8216_REG_MIB_FUNC
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+ .mib_func = AR8216_REG_MIB_FUNC,
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+ .mib_rxb_id = AR8236_MIB_RXB_ID,
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+ .mib_txb_id = AR8236_MIB_TXB_ID,
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};
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static const struct ar8xxx_chip ar8236_chip = {
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@@ -2060,7 +2084,9 @@ static const struct ar8xxx_chip ar8236_chip = {
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.num_mibs = ARRAY_SIZE(ar8236_mibs),
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.mib_decs = ar8236_mibs,
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- .mib_func = AR8216_REG_MIB_FUNC
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+ .mib_func = AR8216_REG_MIB_FUNC,
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+ .mib_rxb_id = AR8236_MIB_RXB_ID,
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+ .mib_txb_id = AR8236_MIB_TXB_ID,
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};
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static const struct ar8xxx_chip ar8316_chip = {
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@@ -2090,7 +2116,9 @@ static const struct ar8xxx_chip ar8316_chip = {
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.num_mibs = ARRAY_SIZE(ar8236_mibs),
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.mib_decs = ar8236_mibs,
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- .mib_func = AR8216_REG_MIB_FUNC
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+ .mib_func = AR8216_REG_MIB_FUNC,
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+ .mib_rxb_id = AR8236_MIB_RXB_ID,
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+ .mib_txb_id = AR8236_MIB_TXB_ID,
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};
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static int
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