ath79: ar724x: Fix reset definition for gmac0/gmac1

reset bit 8 is for builtin switch and bit 12 is marked 'reserved' on datasheet.

Signed-off-by: Chuanhong Guo <[email protected]>

target/linux/ath79/dts/ar7240.dtsi

@@ -59,8 +59,8 @@
 
 	pll-data = <0x00110000 0x00001099 0x00991099>;
 
-	resets = <&rst 8>, <&rst 9>;
-	reset-names = "phy", "mac";
+	resets = <&rst 9>;
+	reset-names = "mac";
 	phy-mode = "mii";
 	phy-handle = <&swphy4>;
 };
@@ -70,8 +70,8 @@
 
 	pll-data = <0x00110000 0x00001099 0x00991099>;
 
-	resets = <&rst 12>, <&rst 13>;
-	reset-names = "phy", "mac";
+	resets = <&rst 13>;
+	reset-names = "mac";
 
 	phy-mode = "gmii";
 

target/linux/ath79/dts/ar7241.dtsi

@@ -44,8 +44,8 @@
 
 	pll-data = <0x00110000 0x00001099 0x00991099>;
 
-	resets = <&rst 8>, <&rst 9>;
-	reset-names = "mac", "phy";
+	resets = <&rst 9>;
+	reset-names = "mac";
 	phy-mode = "mii";
 	phy-handle = <&swphy4>;
 };
@@ -78,8 +78,8 @@
 
 	pll-data = <0x00110000 0x00001099 0x00991099>;
 
-	resets = <&rst 12>, <&rst 13>;
-	reset-names = "mac", "phy";
+	resets = <&rst 13>;
+	reset-names = "mac";
 
 	phy-mode = "gmii";
 

target/linux/ath79/dts/ar7242.dtsi

@@ -51,8 +51,8 @@
 	pll-reg = <0x4 0x2c 17>;
 	pll-handle = <&pll>;
 
-	resets = <&rst 8>, <&rst 9>;
-	reset-names = "mac", "phy";
+	resets = <&rst 9>;
+	reset-names = "mac";
 };
 
 &mdio1 {
@@ -71,8 +71,8 @@
 &eth1 {
 	compatible = "qca,ar7242-eth", "syscon", "simple-mfd";
 
-	resets = <&rst 12>, <&rst 13>;
-	reset-names = "mac", "phy";
+	resets = <&rst 13>;
+	reset-names = "mac";
 
 	phy-mode = "gmii";