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@@ -0,0 +1,407 @@
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+From 51712e1d014aaaa4c6e1e7e84932d58b5c0f59ed Mon Sep 17 00:00:00 2001
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+From: Chukun Pan <[email protected]>
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+Date: Sat, 3 Dec 2022 15:41:49 +0800
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+Subject: [PATCH] arm64: dts: rockchip: rk3328: Add Orange Pi R1 Plus
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+
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+Orange Pi R1 Plus is a Rockchip RK3328 based SBC by Xunlong.
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+
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+This device is similar to the NanoPi R2S, and has a 16MB
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+SPI NOR (mx25l12805d). The reset button is changed to
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+directly reset the power supply, another detail is that
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+both network ports have independent MAC addresses.
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+
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+Signed-off-by: Chukun Pan <[email protected]>
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+Link: https://lore.kernel.org/r/[email protected]
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+Signed-off-by: Heiko Stuebner <[email protected]>
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+---
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+ arch/arm64/boot/dts/rockchip/Makefile | 1 +
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+ .../dts/rockchip/rk3328-orangepi-r1-plus.dts | 373 ++++++++++++++++++
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+ 2 files changed, 374 insertions(+)
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+ create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts
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+
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+--- a/arch/arm64/boot/dts/rockchip/Makefile
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++++ b/arch/arm64/boot/dts/rockchip/Makefile
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+@@ -11,6 +11,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1
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+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
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+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb
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+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
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++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb
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+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
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+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock-pi-e.dtb
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+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb
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+--- /dev/null
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++++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts
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+@@ -0,0 +1,373 @@
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++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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++/*
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++ * Based on rk3328-nanopi-r2s.dts, which is:
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++ * Copyright (c) 2020 David Bauer <[email protected]>
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++ */
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++
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++/dts-v1/;
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++
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++#include <dt-bindings/gpio/gpio.h>
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++#include <dt-bindings/leds/common.h>
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++#include "rk3328.dtsi"
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++
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++/ {
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++ model = "Xunlong Orange Pi R1 Plus";
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++ compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328";
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++
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++ aliases {
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++ ethernet1 = &rtl8153;
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++ mmc0 = &sdmmc;
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++ };
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++
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++ chosen {
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++ stdout-path = "serial2:1500000n8";
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++ };
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++
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++ gmac_clk: gmac-clock {
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++ compatible = "fixed-clock";
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++ clock-frequency = <125000000>;
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++ clock-output-names = "gmac_clkin";
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++ #clock-cells = <0>;
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++ };
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++
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++ leds {
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++ compatible = "gpio-leds";
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++ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
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++ pinctrl-names = "default";
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++
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++ led-0 {
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++ function = LED_FUNCTION_LAN;
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++ color = <LED_COLOR_ID_GREEN>;
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++ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
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++ };
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++
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++ led-1 {
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++ function = LED_FUNCTION_STATUS;
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++ color = <LED_COLOR_ID_RED>;
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++ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
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++ linux,default-trigger = "heartbeat";
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++ };
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++
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++ led-2 {
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++ function = LED_FUNCTION_WAN;
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++ color = <LED_COLOR_ID_GREEN>;
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++ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
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++ };
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++ };
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++
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++ vcc_sd: sdmmc-regulator {
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++ compatible = "regulator-fixed";
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++ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
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++ pinctrl-0 = <&sdmmc0m1_pin>;
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++ pinctrl-names = "default";
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++ regulator-name = "vcc_sd";
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++ regulator-boot-on;
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++ vin-supply = <&vcc_io>;
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++ };
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++
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++ vcc_sys: vcc-sys-regulator {
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++ compatible = "regulator-fixed";
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++ regulator-name = "vcc_sys";
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++ regulator-always-on;
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++ regulator-boot-on;
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++ regulator-min-microvolt = <5000000>;
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++ regulator-max-microvolt = <5000000>;
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++ };
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++
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++ vdd_5v_lan: vdd-5v-lan-regulator {
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++ compatible = "regulator-fixed";
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++ enable-active-high;
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++ gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
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++ pinctrl-0 = <&lan_vdd_pin>;
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++ pinctrl-names = "default";
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++ regulator-name = "vdd_5v_lan";
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++ regulator-always-on;
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++ regulator-boot-on;
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++ vin-supply = <&vcc_sys>;
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++ };
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++};
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++
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++&cpu0 {
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++ cpu-supply = <&vdd_arm>;
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++};
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++
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++&cpu1 {
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++ cpu-supply = <&vdd_arm>;
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++};
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++
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++&cpu2 {
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++ cpu-supply = <&vdd_arm>;
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++};
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++
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++&cpu3 {
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++ cpu-supply = <&vdd_arm>;
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++};
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++
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++&display_subsystem {
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++ status = "disabled";
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++};
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++
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++&gmac2io {
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++ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
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++ assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
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++ clock_in_out = "input";
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++ phy-handle = <&rtl8211e>;
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++ phy-mode = "rgmii";
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++ phy-supply = <&vcc_io>;
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++ pinctrl-0 = <&rgmiim1_pins>;
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++ pinctrl-names = "default";
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++ snps,aal;
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++ rx_delay = <0x18>;
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++ tx_delay = <0x24>;
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++ status = "okay";
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++
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++ mdio {
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++ compatible = "snps,dwmac-mdio";
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++ #address-cells = <1>;
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++ #size-cells = <0>;
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++
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++ rtl8211e: ethernet-phy@1 {
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++ reg = <1>;
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++ pinctrl-0 = <ð_phy_reset_pin>;
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++ pinctrl-names = "default";
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++ reset-assert-us = <10000>;
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++ reset-deassert-us = <50000>;
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++ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
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++ };
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++ };
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++};
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++
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++&i2c1 {
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++ status = "okay";
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++
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++ rk805: pmic@18 {
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++ compatible = "rockchip,rk805";
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++ reg = <0x18>;
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++ interrupt-parent = <&gpio1>;
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++ interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
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++ #clock-cells = <1>;
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++ clock-output-names = "xin32k", "rk805-clkout2";
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++ gpio-controller;
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++ #gpio-cells = <2>;
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++ pinctrl-0 = <&pmic_int_l>;
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++ pinctrl-names = "default";
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++ rockchip,system-power-controller;
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++ wakeup-source;
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++
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++ vcc1-supply = <&vcc_sys>;
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++ vcc2-supply = <&vcc_sys>;
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++ vcc3-supply = <&vcc_sys>;
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++ vcc4-supply = <&vcc_sys>;
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++ vcc5-supply = <&vcc_io>;
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++ vcc6-supply = <&vcc_sys>;
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++
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++ regulators {
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++ vdd_log: DCDC_REG1 {
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++ regulator-name = "vdd_log";
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++ regulator-always-on;
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++ regulator-boot-on;
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++ regulator-min-microvolt = <712500>;
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++ regulator-max-microvolt = <1450000>;
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++ regulator-ramp-delay = <12500>;
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++
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++ regulator-state-mem {
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++ regulator-on-in-suspend;
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++ regulator-suspend-microvolt = <1000000>;
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++ };
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++ };
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++
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++ vdd_arm: DCDC_REG2 {
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++ regulator-name = "vdd_arm";
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++ regulator-always-on;
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++ regulator-boot-on;
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++ regulator-min-microvolt = <712500>;
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++ regulator-max-microvolt = <1450000>;
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++ regulator-ramp-delay = <12500>;
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++
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++ regulator-state-mem {
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++ regulator-on-in-suspend;
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++ regulator-suspend-microvolt = <950000>;
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++ };
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++ };
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++
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++ vcc_ddr: DCDC_REG3 {
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++ regulator-name = "vcc_ddr";
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++ regulator-always-on;
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++ regulator-boot-on;
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++
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++ regulator-state-mem {
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++ regulator-on-in-suspend;
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++ };
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++ };
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++
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++ vcc_io: DCDC_REG4 {
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++ regulator-name = "vcc_io";
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++ regulator-always-on;
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++ regulator-boot-on;
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++ regulator-min-microvolt = <3300000>;
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++ regulator-max-microvolt = <3300000>;
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++
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++ regulator-state-mem {
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++ regulator-on-in-suspend;
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++ regulator-suspend-microvolt = <3300000>;
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++ };
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++ };
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++
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++ vcc_18: LDO_REG1 {
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++ regulator-name = "vcc_18";
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++ regulator-always-on;
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++ regulator-boot-on;
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++ regulator-min-microvolt = <1800000>;
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++ regulator-max-microvolt = <1800000>;
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++
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++ regulator-state-mem {
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++ regulator-on-in-suspend;
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++ regulator-suspend-microvolt = <1800000>;
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++ };
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++ };
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++
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++ vcc18_emmc: LDO_REG2 {
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++ regulator-name = "vcc18_emmc";
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++ regulator-always-on;
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++ regulator-boot-on;
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++ regulator-min-microvolt = <1800000>;
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++ regulator-max-microvolt = <1800000>;
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++
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++ regulator-state-mem {
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++ regulator-on-in-suspend;
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++ regulator-suspend-microvolt = <1800000>;
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++ };
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++ };
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++
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++ vdd_10: LDO_REG3 {
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++ regulator-name = "vdd_10";
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++ regulator-always-on;
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++ regulator-boot-on;
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++ regulator-min-microvolt = <1000000>;
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++ regulator-max-microvolt = <1000000>;
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++
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++ regulator-state-mem {
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++ regulator-on-in-suspend;
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++ regulator-suspend-microvolt = <1000000>;
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++ };
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++ };
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++ };
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++ };
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++};
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++
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++&io_domains {
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++ pmuio-supply = <&vcc_io>;
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++ vccio1-supply = <&vcc_io>;
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++ vccio2-supply = <&vcc18_emmc>;
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++ vccio3-supply = <&vcc_io>;
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++ vccio4-supply = <&vcc_io>;
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++ vccio5-supply = <&vcc_io>;
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++ vccio6-supply = <&vcc_io>;
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++ status = "okay";
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++};
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++
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++&pinctrl {
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++ gmac2io {
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++ eth_phy_reset_pin: eth-phy-reset-pin {
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++ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
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++ };
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++ };
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++
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++ leds {
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++ lan_led_pin: lan-led-pin {
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++ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
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++ };
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++
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++ sys_led_pin: sys-led-pin {
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++ rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
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++ };
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++
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++ wan_led_pin: wan-led-pin {
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++ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
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++ };
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++ };
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++
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++ lan {
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++ lan_vdd_pin: lan-vdd-pin {
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++ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
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++ };
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++ };
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++
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++ pmic {
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++ pmic_int_l: pmic-int-l {
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++ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
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++ };
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++ };
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++};
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++
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++&pwm2 {
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++ status = "okay";
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++};
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++
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++&sdmmc {
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++ bus-width = <4>;
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++ cap-sd-highspeed;
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++ disable-wp;
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++ pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>;
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++ pinctrl-names = "default";
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++ vmmc-supply = <&vcc_sd>;
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++ status = "okay";
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++};
|
|
|
|
++
|
|
|
|
++&spi0 {
|
|
|
|
++ status = "okay";
|
|
|
|
++
|
|
|
|
++ flash@0 {
|
|
|
|
++ compatible = "jedec,spi-nor";
|
|
|
|
++ reg = <0>;
|
|
|
|
++ spi-max-frequency = <50000000>;
|
|
|
|
++ };
|
|
|
|
++};
|
|
|
|
++
|
|
|
|
++&tsadc {
|
|
|
|
++ rockchip,hw-tshut-mode = <0>;
|
|
|
|
++ rockchip,hw-tshut-polarity = <0>;
|
|
|
|
++ status = "okay";
|
|
|
|
++};
|
|
|
|
++
|
|
|
|
++&u2phy {
|
|
|
|
++ status = "okay";
|
|
|
|
++};
|
|
|
|
++
|
|
|
|
++&u2phy_host {
|
|
|
|
++ status = "okay";
|
|
|
|
++};
|
|
|
|
++
|
|
|
|
++&u2phy_otg {
|
|
|
|
++ status = "okay";
|
|
|
|
++};
|
|
|
|
++
|
|
|
|
++&uart2 {
|
|
|
|
++ status = "okay";
|
|
|
|
++};
|
|
|
|
++
|
|
|
|
++&usb20_otg {
|
|
|
|
++ dr_mode = "host";
|
|
|
|
++ status = "okay";
|
|
|
|
++};
|
|
|
|
++
|
|
|
|
++&usbdrd3 {
|
|
|
|
++ dr_mode = "host";
|
|
|
|
++ status = "okay";
|
|
|
|
++ #address-cells = <1>;
|
|
|
|
++ #size-cells = <0>;
|
|
|
|
++
|
|
|
|
++ /* Second port is for USB 3.0 */
|
|
|
|
++ rtl8153: device@2 {
|
|
|
|
++ compatible = "usbbda,8153";
|
|
|
|
++ reg = <2>;
|
|
|
|
++ };
|
|
|
|
++};
|
|
|
|
++
|
|
|
|
++&usb_host0_ehci {
|
|
|
|
++ status = "okay";
|
|
|
|
++};
|
|
|
|
++
|
|
|
|
++&usb_host0_ohci {
|
|
|
|
++ status = "okay";
|
|
|
|
++};
|