Bläddra i källkod

ar71xx: add support for the TP-Link TL-WR1041N v2 board

Patch-by: Vince Huang <[email protected]>

SVN-Revision: 31608
Gabor Juhos 13 år sedan
förälder
incheckning
ab897ab04e

+ 1 - 0
target/linux/ar71xx/base-files/etc/diag.sh

@@ -112,6 +112,7 @@ get_status_led() {
 	tl-mr3420 | \
 	tl-wa901nd | \
 	tl-wa901nd-v2 | \
+	tl-wr1041n-v2 | \
 	tl-wr1043nd | \
 	tl-wr741nd | \
 	tl-wr741nd-v4 | \

+ 2 - 1
target/linux/ar71xx/base-files/etc/uci-defaults/leds

@@ -188,7 +188,8 @@ tl-wr741nd-v4)
 	set_led_wlan "wlan" "WLAN" "tp-link:green:wlan" "phy0tpt"
 	;;
 
-tl-wr941nd)
+tl-wr941nd | \
+tl-wr1041n-v2)
 	set_led_wlan "wlan" "WLAN" "tp-link:green:wlan" "phy0tpt"
 	;;
 

+ 7 - 0
target/linux/ar71xx/base-files/etc/uci-defaults/network

@@ -89,6 +89,13 @@ ap113)
 	ucidef_add_switch_vlan "eth0" "2" "0t 2"
 	;;
 
+tl-wr1041n-v2)
+	ucidef_set_interfaces_lan_wan "eth0.1" "eth0.2"
+	ucidef_add_switch "eth0" "1" "1"
+	ucidef_add_switch_vlan "eth0" "1" "0t 2 3 4 5"
+	ucidef_add_switch_vlan "eth0" "2" "0t 1"
+	;;
+
 tl-wr1043nd)
 	ucidef_set_interfaces_lan_wan "eth0.1" "eth0.2"
 	ucidef_add_switch "rtl8366rb" "1" "1"

+ 6 - 0
target/linux/ar71xx/base-files/lib/ar71xx.sh

@@ -97,6 +97,9 @@ tplink_board_detect() {
 	"094100"*)
 		model="TP-Link TL-WR941N/ND"
 		;;
+	"104100"*)
+		model="TP-Link TL-WR1041N/ND"
+		;;
 	"104300"*)
 		model="TP-Link TL-WR1043N/ND"
 		;;
@@ -274,6 +277,9 @@ ar71xx_board_detect() {
 	*TEW-673GRU)
 		name="tew-673gru"
 		;;
+	*"TL-WR1041N v2")
+		name="tl-wr1041n-v2"
+		;;
 	*TL-WR1043ND)
 		name="tl-wr1043nd"
 		;;

+ 1 - 0
target/linux/ar71xx/base-files/lib/upgrade/platform.sh

@@ -136,6 +136,7 @@ platform_check_image() {
 	tl-wr841n-v1 | \
 	tl-wr841n-v7 | \
 	tl-wr941nd | \
+	tl-wr1041n-v2 | \
 	tl-wr1043nd | \
 	tl-wr2543n)
 		[ "$magic" != "0100" ] && {

+ 1 - 0
target/linux/ar71xx/config-3.3

@@ -57,6 +57,7 @@ CONFIG_ATH79_MACH_TL_MR3020=y
 CONFIG_ATH79_MACH_TL_MR3X20=y
 CONFIG_ATH79_MACH_TL_WA901ND=y
 CONFIG_ATH79_MACH_TL_WA901ND_V2=y
+CONFIG_ATH79_MACH_TL_WR1041N_V2=y
 CONFIG_ATH79_MACH_TL_WR1043ND=y
 CONFIG_ATH79_MACH_TL_WR2543N=y
 CONFIG_ATH79_MACH_TL_WR703N=y

+ 154 - 0
target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1041n-v2.c

@@ -0,0 +1,154 @@
+/*
+ *  TP-LINK TL-WR1041 v2 board support
+ *
+ *  Copyright (C) 2010-2012 Gabor Juhos <[email protected]>
+ *  Copyright (C) 2011-2012 Anan Huang <[email protected]>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/pci.h>
+#include <linux/phy.h>
+#include <linux/platform_device.h>
+#include <linux/ath9k_platform.h>
+#include <linux/ar8216_platform.h>
+
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#include "common.h"
+#include "dev-ap9x-pci.h"
+#include "dev-eth.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-spi.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+
+#define TL_WR1041NV2_GPIO_BTN_RESET	14
+#define TL_WR1041NV2_GPIO_LED_WPS	13
+#define TL_WR1041NV2_GPIO_LED_WLAN	11
+
+#define TL_WR1041NV2_GPIO_LED_SYSTEM	12
+
+#define TL_WR1041NV2_KEYS_POLL_INTERVAL		20	/* msecs */
+#define TL_WR1041NV2_KEYS_DEBOUNCE_INTERVAL	(3 * TL_WR1041NV2_KEYS_POLL_INTERVAL)
+
+#define TL_WR1041NV2_PCIE_CALDATA_OFFSET	0x5000
+
+static const char *tl_wr1041nv2_part_probes[] = {
+	"tp-link",
+	NULL,
+};
+
+static struct flash_platform_data tl_wr1041nv2_flash_data = {
+	.part_probes	= tl_wr1041nv2_part_probes,
+};
+
+static struct gpio_led tl_wr1041nv2_leds_gpio[] __initdata = {
+	{
+		.name		= "tp-link:green:system",
+		.gpio		= TL_WR1041NV2_GPIO_LED_SYSTEM,
+		.active_low	= 1,
+	}, {
+		.name		= "tp-link:green:wps",
+		.gpio		= TL_WR1041NV2_GPIO_LED_WPS,
+		.active_low	= 1,
+	}, {
+		.name		= "tp-link:green:wlan",
+		.gpio		= TL_WR1041NV2_GPIO_LED_WLAN,
+		.active_low	= 1,
+	}
+};
+
+static struct gpio_keys_button tl_wr1041nv2_gpio_keys[] __initdata = {
+	{
+		.desc		= "reset",
+		.type		= EV_KEY,
+		.code		= KEY_RESTART,
+		.debounce_interval = TL_WR1041NV2_KEYS_DEBOUNCE_INTERVAL,
+		.gpio		= TL_WR1041NV2_GPIO_BTN_RESET,
+		.active_low	= 1,
+	}
+};
+
+static struct ar8327_pad_cfg db120_ar8327_pad0_cfg = {
+	.mode = AR8327_PAD_MAC_RGMII,
+	.txclk_delay_en = true,
+	.rxclk_delay_en = true,
+	.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
+	.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
+};
+
+static struct ar8327_platform_data db120_ar8327_data = {
+	.pad0_cfg = &db120_ar8327_pad0_cfg,
+	.cpuport_cfg = {
+		.force_link = 1,
+		.speed = AR8327_PORT_SPEED_1000,
+		.duplex = 1,
+		.txpause = 1,
+		.rxpause = 1,
+	}
+};
+
+static struct mdio_board_info db120_mdio0_info[] = {
+	{
+		.bus_id = "ag71xx-mdio.0",
+		.phy_addr = 0,
+		.platform_data = &db120_ar8327_data,
+	},
+};
+
+static void __init db120_gmac_setup(void)
+{
+	void __iomem *base;
+	u32 t;
+
+	base = ioremap(AR934X_GMAC_BASE, AR934X_GMAC_SIZE);
+
+	t = __raw_readl(base + AR934X_GMAC_REG_ETH_CFG);
+	t &= ~(AR934X_ETH_CFG_RGMII_GMAC0 | AR934X_ETH_CFG_MII_GMAC0 |
+	       AR934X_ETH_CFG_GMII_GMAC0 | AR934X_ETH_CFG_SW_ONLY_MODE);
+	t |= AR934X_ETH_CFG_RGMII_GMAC0 | AR934X_ETH_CFG_SW_ONLY_MODE;
+
+	__raw_writel(t, base + AR934X_GMAC_REG_ETH_CFG);
+
+	iounmap(base);
+}
+
+static void __init tl_wr1041nv2_setup(void)
+{
+	u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
+	u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
+
+	ath79_register_m25p80(&tl_wr1041nv2_flash_data);
+
+	ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr1041nv2_leds_gpio),
+				 tl_wr1041nv2_leds_gpio);
+	ath79_register_gpio_keys_polled(-1, TL_WR1041NV2_KEYS_POLL_INTERVAL,
+					 ARRAY_SIZE(tl_wr1041nv2_gpio_keys),
+					 tl_wr1041nv2_gpio_keys);
+	ath79_register_wmac(ee, mac);
+
+	db120_gmac_setup();
+
+	ath79_register_mdio(1, 0x0);
+	ath79_register_mdio(0, 0x0);
+
+	ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
+
+	mdiobus_register_board_info(db120_mdio0_info,
+				    ARRAY_SIZE(db120_mdio0_info));
+
+	/* GMAC0 is connected to an AR8327 switch */
+	ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
+	ath79_eth0_data.phy_mask = BIT(0);
+	ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
+	ath79_eth0_pll_data.pll_1000 = 0x06000000;
+	ath79_register_eth(0);
+}
+
+MIPS_MACHINE(ATH79_MACH_TL_WR1041N_V2, "TL-WR1041N-v2",
+	     "TP-LINK TL-WR1041N v2", tl_wr1041nv2_setup);

+ 40 - 0
target/linux/ar71xx/patches-3.3/615-MIPS-ath79-WR1041N-support.patch

@@ -0,0 +1,40 @@
+--- a/arch/mips/ath79/Kconfig
++++ b/arch/mips/ath79/Kconfig
+@@ -451,6 +451,17 @@ config ATH79_MACH_TL_WR941ND
+ 	select ATH79_DEV_M25P80
+ 	select ATH79_DEV_WMAC
+ 
++config ATH79_MACH_TL_WR1041N_V2
++	bool "TP-LINK TL-WR1041N v2 support"
++	select SOC_AR934X
++	select ATH79_DEV_AP9X_PCI if PCI
++	select ATH79_DEV_ETH
++	select ATH79_DEV_GPIO_BUTTONS
++	select ATH79_DEV_LEDS_GPIO
++	select ATH79_DEV_M25P80
++	select ATH79_DEV_USB
++	select ATH79_DEV_WMAC
++
+ config ATH79_MACH_TL_WR1043ND
+ 	bool "TP-LINK TL-WR1043ND support"
+ 	select SOC_AR913X
+--- a/arch/mips/ath79/machtypes.h
++++ b/arch/mips/ath79/machtypes.h
+@@ -64,6 +64,7 @@ enum ath79_mach_type {
+ 	ATH79_MACH_TL_MR3420,		/* TP-LINK TL-MR3420 */
+ 	ATH79_MACH_TL_WA901ND,		/* TP-LINK TL-WA901ND */
+ 	ATH79_MACH_TL_WA901ND_V2,	/* TP-LINK TL-WA901ND v2 */
++	ATH79_MACH_TL_WR1041N_V2,	/* TP-LINK TL-WR1041N v2 */
+ 	ATH79_MACH_TL_WR1043ND,		/* TP-LINK TL-WR1041ND */
+ 	ATH79_MACH_TL_WR2543N,		/* TP-LINK TL-WR2543N/ND */
+ 	ATH79_MACH_TL_WR703N,		/* TP-LINK TL-WR703N */
+--- a/arch/mips/ath79/Makefile
++++ b/arch/mips/ath79/Makefile
+@@ -74,6 +74,7 @@ obj-$(CONFIG_ATH79_MACH_TL_WR741ND)	+= m
+ obj-$(CONFIG_ATH79_MACH_TL_WR741ND_V4)	+= mach-tl-wr741nd-v4.o
+ obj-$(CONFIG_ATH79_MACH_TL_WR841N_V1)	+= mach-tl-wr841n.o
+ obj-$(CONFIG_ATH79_MACH_TL_WR941ND)	+= mach-tl-wr941nd.o
++obj-$(CONFIG_ATH79_MACH_TL_WR1041N_V2)	+= mach-tl-wr1041n-v2.o
+ obj-$(CONFIG_ATH79_MACH_TL_WR1043ND)	+= mach-tl-wr1043nd.o
+ obj-$(CONFIG_ATH79_MACH_TL_WR2543N)	+= mach-tl-wr2543n.o
+ obj-$(CONFIG_ATH79_MACH_TL_WR703N)	+= mach-tl-wr703n.o