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@@ -0,0 +1,38 @@
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+From 6a25e70214fde6dcf900271c819c8d7fe7b9a4b0 Mon Sep 17 00:00:00 2001
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+From: Robert Marko <[email protected]>
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+Date: Thu, 23 Nov 2023 13:12:54 +0100
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+Subject: [PATCH] arm64: dts: qcom: ipq8074: Add QUP4 SPI node
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+
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+Add node to support the QUP4 SPI controller inside of IPQ8074.
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+Some devices use this bus to communicate to a Bluetooth controller.
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+
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+Signed-off-by: Robert Marko <[email protected]>
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+Link: https://lore.kernel.org/r/[email protected]
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+Signed-off-by: Bjorn Andersson <[email protected]>
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+---
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+ arch/arm64/boot/dts/qcom/ipq8074.dtsi | 14 ++++++++++++++
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+ 1 file changed, 14 insertions(+)
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+
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+--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
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++++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
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+@@ -529,6 +529,20 @@
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+ status = "disabled";
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+ };
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+
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++ blsp1_spi4: spi@78b8000 {
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++ compatible = "qcom,spi-qup-v2.2.1";
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++ #address-cells = <1>;
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++ #size-cells = <0>;
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++ reg = <0x78b8000 0x600>;
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++ interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
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++ clocks = <&gcc GCC_BLSP1_QUP4_SPI_APPS_CLK>,
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++ <&gcc GCC_BLSP1_AHB_CLK>;
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++ clock-names = "core", "iface";
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++ dmas = <&blsp_dma 18>, <&blsp_dma 19>;
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++ dma-names = "tx", "rx";
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++ status = "disabled";
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++ };
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++
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+ blsp1_i2c5: i2c@78b9000 {
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+ compatible = "qcom,i2c-qup-v2.2.1";
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+ #address-cells = <1>;
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Robert Marko