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@@ -15,7 +15,7 @@ Signed-off-by: Christian Marangi <[email protected]>
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--- a/drivers/pinctrl/mediatek/pinctrl-airoha.c
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+++ b/drivers/pinctrl/mediatek/pinctrl-airoha.c
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-@@ -75,6 +75,7 @@
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+@@ -69,6 +69,7 @@
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#define GPIO_PCM_SPI_CS3_MODE_MASK BIT(20)
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#define GPIO_PCM_SPI_CS2_MODE_P156_MASK BIT(19)
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#define GPIO_PCM_SPI_CS2_MODE_P128_MASK BIT(18)
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@@ -23,7 +23,7 @@ Signed-off-by: Christian Marangi <[email protected]>
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#define GPIO_PCM_SPI_CS1_MODE_MASK BIT(17)
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#define GPIO_PCM_SPI_MODE_MASK BIT(16)
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#define GPIO_PCM2_MODE_MASK BIT(13)
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-@@ -132,6 +133,8 @@
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+@@ -126,6 +127,8 @@
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/* CONF */
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#define REG_I2C_SDA_E2 0x001c
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@@ -32,7 +32,7 @@ Signed-off-by: Christian Marangi <[email protected]>
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#define SPI_MISO_E2_MASK BIT(14)
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#define SPI_MOSI_E2_MASK BIT(13)
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#define SPI_CLK_E2_MASK BIT(12)
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-@@ -139,12 +142,16 @@
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+@@ -133,12 +136,16 @@
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#define PCIE2_RESET_E2_MASK BIT(10)
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#define PCIE1_RESET_E2_MASK BIT(9)
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#define PCIE0_RESET_E2_MASK BIT(8)
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@@ -49,7 +49,7 @@ Signed-off-by: Christian Marangi <[email protected]>
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#define SPI_MISO_E4_MASK BIT(14)
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#define SPI_MOSI_E4_MASK BIT(13)
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#define SPI_CLK_E4_MASK BIT(12)
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-@@ -152,6 +159,8 @@
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+@@ -146,6 +153,8 @@
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#define PCIE2_RESET_E4_MASK BIT(10)
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#define PCIE1_RESET_E4_MASK BIT(9)
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#define PCIE0_RESET_E4_MASK BIT(8)
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@@ -58,7 +58,7 @@ Signed-off-by: Christian Marangi <[email protected]>
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#define UART1_RXD_E4_MASK BIT(3)
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#define UART1_TXD_E4_MASK BIT(2)
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#define I2C_SCL_E4_MASK BIT(1)
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-@@ -163,6 +172,8 @@
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+@@ -157,6 +166,8 @@
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#define REG_GPIO_H_E4 0x0030
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#define REG_I2C_SDA_PU 0x0044
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@@ -67,7 +67,7 @@ Signed-off-by: Christian Marangi <[email protected]>
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#define SPI_MISO_PU_MASK BIT(14)
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#define SPI_MOSI_PU_MASK BIT(13)
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#define SPI_CLK_PU_MASK BIT(12)
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-@@ -170,12 +181,16 @@
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+@@ -164,12 +175,16 @@
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#define PCIE2_RESET_PU_MASK BIT(10)
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#define PCIE1_RESET_PU_MASK BIT(9)
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#define PCIE0_RESET_PU_MASK BIT(8)
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@@ -84,7 +84,7 @@ Signed-off-by: Christian Marangi <[email protected]>
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#define SPI_MISO_PD_MASK BIT(14)
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#define SPI_MOSI_PD_MASK BIT(13)
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#define SPI_CLK_PD_MASK BIT(12)
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-@@ -183,6 +198,8 @@
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+@@ -177,6 +192,8 @@
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#define PCIE2_RESET_PD_MASK BIT(10)
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#define PCIE1_RESET_PD_MASK BIT(9)
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#define PCIE0_RESET_PD_MASK BIT(8)
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@@ -93,7 +93,7 @@ Signed-off-by: Christian Marangi <[email protected]>
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#define UART1_RXD_PD_MASK BIT(3)
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#define UART1_TXD_PD_MASK BIT(2)
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#define I2C_SCL_PD_MASK BIT(1)
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-@@ -630,10 +647,223 @@ static const struct pingroup en7581_pinc
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+@@ -624,10 +641,223 @@ static const struct pingroup en7581_pinc
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PINCTRL_PIN_GROUP("pcie_reset2", en7581_pcie_reset2),
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};
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@@ -317,7 +317,7 @@ Signed-off-by: Christian Marangi <[email protected]>
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static const char *const uart_groups[] = { "uart2", "uart2_cts_rts", "hsuart",
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"hsuart_cts_rts", "uart4",
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"uart5" };
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-@@ -646,11 +876,16 @@ static const char *const pcm_spi_groups[
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+@@ -640,11 +870,16 @@ static const char *const pcm_spi_groups[
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"pcm_spi_cs2_p156",
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"pcm_spi_cs2_p128",
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"pcm_spi_cs3", "pcm_spi_cs4" };
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@@ -334,7 +334,7 @@ Signed-off-by: Christian Marangi <[email protected]>
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static const char *const pwm_groups[] = { "gpio0", "gpio1",
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"gpio2", "gpio3",
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"gpio4", "gpio5",
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-@@ -689,6 +924,22 @@ static const char *const phy3_led1_group
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+@@ -683,6 +918,22 @@ static const char *const phy3_led1_group
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"gpio45", "gpio46" };
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static const char *const phy4_led1_groups[] = { "gpio43", "gpio44",
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"gpio45", "gpio46" };
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@@ -357,7 +357,7 @@ Signed-off-by: Christian Marangi <[email protected]>
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static const struct airoha_pinctrl_func_group pon_func_group[] = {
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{
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-@@ -766,6 +1017,25 @@ static const struct airoha_pinctrl_func_
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+@@ -760,6 +1011,25 @@ static const struct airoha_pinctrl_func_
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},
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};
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@@ -383,7 +383,7 @@ Signed-off-by: Christian Marangi <[email protected]>
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static const struct airoha_pinctrl_func_group uart_func_group[] = {
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{
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.name = "uart2",
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-@@ -1007,6 +1277,73 @@ static const struct airoha_pinctrl_func_
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+@@ -1001,6 +1271,73 @@ static const struct airoha_pinctrl_func_
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},
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};
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@@ -457,7 +457,7 @@ Signed-off-by: Christian Marangi <[email protected]>
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static const struct airoha_pinctrl_func_group i2s_func_group[] = {
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{
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.name = "i2s",
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-@@ -1077,6 +1414,28 @@ static const struct airoha_pinctrl_func_
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+@@ -1071,6 +1408,28 @@ static const struct airoha_pinctrl_func_
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},
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};
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@@ -486,7 +486,7 @@ Signed-off-by: Christian Marangi <[email protected]>
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/* PWM */
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#define AIROHA_PINCTRL_PWM(gpio, mux_val) \
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{ \
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-@@ -1255,6 +1614,94 @@ static const struct airoha_pinctrl_func_
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+@@ -1249,6 +1608,94 @@ static const struct airoha_pinctrl_func_
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LAN3_LED_MAPPING_MASK, LAN3_PHY_LED_MAP(2)),
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};
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@@ -581,7 +581,7 @@ Signed-off-by: Christian Marangi <[email protected]>
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static const struct airoha_pinctrl_func en7581_pinctrl_funcs[] = {
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PINCTRL_FUNC_DESC("pon", pon),
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PINCTRL_FUNC_DESC("tod_1pps", tod_1pps),
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-@@ -1281,6 +1728,31 @@ static const struct airoha_pinctrl_func
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+@@ -1275,6 +1722,31 @@ static const struct airoha_pinctrl_func
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PINCTRL_FUNC_DESC("phy4_led1", phy4_led1),
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};
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@@ -613,7 +613,7 @@ Signed-off-by: Christian Marangi <[email protected]>
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static const struct airoha_pinctrl_conf en7581_pinctrl_pullup_conf[] = {
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PINCTRL_CONF_DESC(0, REG_I2C_SDA_PU, UART1_TXD_PU_MASK),
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PINCTRL_CONF_DESC(1, REG_I2C_SDA_PU, UART1_RXD_PU_MASK),
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-@@ -1342,6 +1814,62 @@ static const struct airoha_pinctrl_conf
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+@@ -1336,6 +1808,62 @@ static const struct airoha_pinctrl_conf
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PINCTRL_CONF_DESC(63, REG_I2C_SDA_PU, PCIE2_RESET_PU_MASK),
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};
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@@ -676,7 +676,7 @@ Signed-off-by: Christian Marangi <[email protected]>
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static const struct airoha_pinctrl_conf en7581_pinctrl_pulldown_conf[] = {
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PINCTRL_CONF_DESC(0, REG_I2C_SDA_PD, UART1_TXD_PD_MASK),
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PINCTRL_CONF_DESC(1, REG_I2C_SDA_PD, UART1_RXD_PD_MASK),
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-@@ -1403,6 +1931,62 @@ static const struct airoha_pinctrl_conf
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+@@ -1397,6 +1925,62 @@ static const struct airoha_pinctrl_conf
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PINCTRL_CONF_DESC(63, REG_I2C_SDA_PD, PCIE2_RESET_PD_MASK),
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};
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@@ -739,7 +739,7 @@ Signed-off-by: Christian Marangi <[email protected]>
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static const struct airoha_pinctrl_conf en7581_pinctrl_drive_e2_conf[] = {
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PINCTRL_CONF_DESC(0, REG_I2C_SDA_E2, UART1_TXD_E2_MASK),
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PINCTRL_CONF_DESC(1, REG_I2C_SDA_E2, UART1_RXD_E2_MASK),
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-@@ -1464,6 +2048,62 @@ static const struct airoha_pinctrl_conf
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+@@ -1458,6 +2042,62 @@ static const struct airoha_pinctrl_conf
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PINCTRL_CONF_DESC(63, REG_I2C_SDA_E2, PCIE2_RESET_E2_MASK),
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};
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@@ -802,7 +802,7 @@ Signed-off-by: Christian Marangi <[email protected]>
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static const struct airoha_pinctrl_conf en7581_pinctrl_drive_e4_conf[] = {
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PINCTRL_CONF_DESC(0, REG_I2C_SDA_E4, UART1_TXD_E4_MASK),
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PINCTRL_CONF_DESC(1, REG_I2C_SDA_E4, UART1_RXD_E4_MASK),
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-@@ -1525,12 +2165,73 @@ static const struct airoha_pinctrl_conf
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+@@ -1519,12 +2159,73 @@ static const struct airoha_pinctrl_conf
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PINCTRL_CONF_DESC(63, REG_I2C_SDA_E4, PCIE2_RESET_E4_MASK),
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};
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@@ -876,7 +876,7 @@ Signed-off-by: Christian Marangi <[email protected]>
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static int airoha_convert_pin_to_reg_offset(struct pinctrl_dev *pctrl_dev,
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struct pinctrl_gpio_range *range,
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int pin)
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-@@ -2267,8 +2968,40 @@ static const struct airoha_pinctrl_match
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+@@ -2266,8 +2967,40 @@ static const struct airoha_pinctrl_match
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},
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};
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