|
|
@@ -1,51 +1,99 @@
|
|
|
-From 8622d6da5d95293d474c156612fd819fdaf542ec Mon Sep 17 00:00:00 2001
|
|
|
+From b5989f783de046577067fe356b1bb76cae07e867 Mon Sep 17 00:00:00 2001
|
|
|
From: Kapil Hali <[email protected]>
|
|
|
-Date: Wed, 25 Nov 2015 08:58:53 -0500
|
|
|
-Subject: [PATCH 131/134] ARM: BCM: Clean up SMP support for Broadcom Kona
|
|
|
+Date: Sat, 5 Dec 2015 06:53:41 -0500
|
|
|
+Subject: [PATCH] ARM: BCM: Clean up SMP support for Broadcom Kona
|
|
|
|
|
|
These changes cleans up SMP implementaion for Broadcom's
|
|
|
Kona SoC which are required for handling SMP for iProc
|
|
|
family of SoCs at a single place for BCM NSP and BCM Kona.
|
|
|
|
|
|
Signed-off-by: Kapil Hali <[email protected]>
|
|
|
+Signed-off-by: Florian Fainelli <[email protected]>
|
|
|
---
|
|
|
- arch/arm/boot/dts/bcm11351.dtsi | 2 +-
|
|
|
- arch/arm/boot/dts/bcm21664.dtsi | 2 +-
|
|
|
- arch/arm/mach-bcm/kona_smp.c | 82 +++++++++++++++++++++++++++--------------
|
|
|
- 3 files changed, 56 insertions(+), 30 deletions(-)
|
|
|
+ .../bindings/arm/bcm/brcm,bcm11351-cpu-method.txt | 12 ++--
|
|
|
+ arch/arm/boot/dts/bcm11351.dtsi | 4 +-
|
|
|
+ arch/arm/boot/dts/bcm21664.dtsi | 4 +-
|
|
|
+ arch/arm/mach-bcm/kona_smp.c | 82 ++++++++++++++--------
|
|
|
+ 4 files changed, 64 insertions(+), 38 deletions(-)
|
|
|
|
|
|
+--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351-cpu-method.txt
|
|
|
++++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351-cpu-method.txt
|
|
|
+@@ -1,17 +1,17 @@
|
|
|
+ Broadcom Kona Family CPU Enable Method
|
|
|
+ --------------------------------------
|
|
|
+ This binding defines the enable method used for starting secondary
|
|
|
+-CPUs in the following Broadcom SoCs:
|
|
|
++CPU in the following Broadcom SoCs:
|
|
|
+ BCM11130, BCM11140, BCM11351, BCM28145, BCM28155, BCM21664
|
|
|
+
|
|
|
+ The enable method is specified by defining the following required
|
|
|
+-properties in the "cpus" device tree node:
|
|
|
++properties in the corresponding secondary "cpu" device tree node:
|
|
|
+ - enable-method = "brcm,bcm11351-cpu-method";
|
|
|
+ - secondary-boot-reg = <...>;
|
|
|
+
|
|
|
+ The secondary-boot-reg property is a u32 value that specifies the
|
|
|
+-physical address of the register used to request the ROM holding pen
|
|
|
+-code release a secondary CPU. The value written to the register is
|
|
|
++physical address of the register used to request the ROM code
|
|
|
++release a secondary CPU. The value written to the register is
|
|
|
+ formed by encoding the target CPU id into the low bits of the
|
|
|
+ physical start address it should jump to.
|
|
|
+
|
|
|
+@@ -19,8 +19,6 @@ Example:
|
|
|
+ cpus {
|
|
|
+ #address-cells = <1>;
|
|
|
+ #size-cells = <0>;
|
|
|
+- enable-method = "brcm,bcm11351-cpu-method";
|
|
|
+- secondary-boot-reg = <0x3500417c>;
|
|
|
+
|
|
|
+ cpu0: cpu@0 {
|
|
|
+ device_type = "cpu";
|
|
|
+@@ -31,6 +29,8 @@ Example:
|
|
|
+ cpu1: cpu@1 {
|
|
|
+ device_type = "cpu";
|
|
|
+ compatible = "arm,cortex-a9";
|
|
|
++ enable-method = "brcm,bcm11351-cpu-method";
|
|
|
++ secondary-boot-reg = <0x3500417c>;
|
|
|
+ reg = <1>;
|
|
|
+ };
|
|
|
+ };
|
|
|
--- a/arch/arm/boot/dts/bcm11351.dtsi
|
|
|
+++ b/arch/arm/boot/dts/bcm11351.dtsi
|
|
|
-@@ -31,7 +31,6 @@
|
|
|
+@@ -30,8 +30,6 @@
|
|
|
+ cpus {
|
|
|
#address-cells = <1>;
|
|
|
#size-cells = <0>;
|
|
|
- enable-method = "brcm,bcm11351-cpu-method";
|
|
|
+- enable-method = "brcm,bcm11351-cpu-method";
|
|
|
- secondary-boot-reg = <0x3500417c>;
|
|
|
|
|
|
cpu0: cpu@0 {
|
|
|
device_type = "cpu";
|
|
|
-@@ -42,6 +41,7 @@
|
|
|
+@@ -42,6 +40,8 @@
|
|
|
cpu1: cpu@1 {
|
|
|
device_type = "cpu";
|
|
|
compatible = "arm,cortex-a9";
|
|
|
++ enable-method = "brcm,bcm11351-cpu-method";
|
|
|
+ secondary-boot-reg = <0x3500417c>;
|
|
|
reg = <1>;
|
|
|
};
|
|
|
};
|
|
|
--- a/arch/arm/boot/dts/bcm21664.dtsi
|
|
|
+++ b/arch/arm/boot/dts/bcm21664.dtsi
|
|
|
-@@ -31,7 +31,6 @@
|
|
|
+@@ -30,8 +30,6 @@
|
|
|
+ cpus {
|
|
|
#address-cells = <1>;
|
|
|
#size-cells = <0>;
|
|
|
- enable-method = "brcm,bcm11351-cpu-method";
|
|
|
+- enable-method = "brcm,bcm11351-cpu-method";
|
|
|
- secondary-boot-reg = <0x35004178>;
|
|
|
|
|
|
cpu0: cpu@0 {
|
|
|
device_type = "cpu";
|
|
|
-@@ -42,6 +41,7 @@
|
|
|
+@@ -42,6 +40,8 @@
|
|
|
cpu1: cpu@1 {
|
|
|
device_type = "cpu";
|
|
|
compatible = "arm,cortex-a9";
|
|
|
++ enable-method = "brcm,bcm11351-cpu-method";
|
|
|
+ secondary-boot-reg = <0x35004178>;
|
|
|
reg = <1>;
|
|
|
};
|
|
|
@@ -169,7 +217,7 @@ Signed-off-by: Kapil Hali <[email protected]>
|
|
|
{
|
|
|
void __iomem *boot_reg;
|
|
|
phys_addr_t boot_func;
|
|
|
-@@ -154,15 +179,16 @@ static int bcm_boot_secondary(unsigned i
|
|
|
+@@ -154,15 +179,16 @@ static int bcm_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
|
|
return -EINVAL;
|
|
|
}
|
|
|
|
|
|
@@ -189,7 +237,7 @@ Signed-off-by: Kapil Hali <[email protected]>
|
|
|
}
|
|
|
|
|
|
/*
|
|
|
-@@ -191,12 +217,12 @@ static int bcm_boot_secondary(unsigned i
|
|
|
+@@ -191,12 +217,12 @@ static int bcm_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
|
|
|
|
|
pr_err("timeout waiting for cpu %u to start\n", cpu_id);
|
|
|
|
Rafał Miłecki