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airoha: an7581: correctly attach the USB2 PHY for 3rd PCIe line

The 3rd PCIe line use the USB2 serdes for PCIe operation. Correctly set
it to the DT node so that the mode can be correctly set in the PHY
driver.

Signed-off-by: Christian Marangi <[email protected]>
(cherry picked from commit 3ba92e0e3268c07859859968368602d2dc758148)
Christian Marangi 2 ヶ月 前
コミット
b5a66740c2
1 ファイル変更1 行追加1 行削除
  1. 1 1
      target/linux/airoha/dts/an7581.dtsi

+ 1 - 1
target/linux/airoha/dts/an7581.dtsi

@@ -780,7 +780,7 @@
 			clocks = <&scuclk EN7523_CLK_PCIE>;
 			clocks = <&scuclk EN7523_CLK_PCIE>;
 			clock-names = "sys-ck";
 			clock-names = "sys-ck";
 
 
-			phys = <&pciephy>;
+			phys = <&usb1_phy PHY_TYPE_USB3>;
 			phy-names = "pcie-phy";
 			phy-names = "pcie-phy";
 
 
 			ranges = <0x02000000 0 0x28000000 0x0 0x28000000 0 0x4000000>;
 			ranges = <0x02000000 0 0x28000000 0x0 0x28000000 0 0x4000000>;