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@@ -0,0 +1,204 @@
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+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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+/dts-v1/;
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+#include "sf21h8898.dtsi"
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+
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+/ {
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+ chosen {
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+ bootargs = "root=/dev/fit0 rootwait";
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+ stdout-path = "serial1:115200n8";
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+ rootdisk = <&rootdisk>;
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+ };
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+
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+ memory@20000000 {
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+ device_type = "memory";
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+ reg = <0x0 0x20000000 0x0 0x20000000>;
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+ };
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+
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+ usb_vbus: regulator@0 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "usb_vbus";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ gpio = <&gpio 37 GPIO_ACTIVE_HIGH>;
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+ enable-active-high;
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+ };
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+};
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+
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+&spi0_pins {
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+ pinctrl-single,pins = <
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+ SPI0_TXD FUNC_MODE0
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+ SPI0_RXD FUNC_MODE0
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+ SPI0_CLK FUNC_MODE0
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+ SPI0_HOLD FUNC_MODE0
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+ SPI0_WP FUNC_MODE0
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+ >;
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+};
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+
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+&watchdog {
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+ status = "okay";
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+};
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+
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+&uart1 {
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+ status = "okay";
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+};
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+
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+&iomux {
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+ rtc_int_gpio: rtc-int-pins {
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+ pinctrl-single,pins = <PHY_INT GPIO_MODE>;
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+ // disable internal bias as it's externally (and weakly) pulled up
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+ pinctrl-single,bias-pullup = <0 SW_PU 0 SW_PU>;
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+ pinctrl-single,bias-pulldown = <0 SW_PD 0 SW_PD>;
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+ };
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+};
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+
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+&i2c0 {
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+ status = "okay";
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+
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+ rtc: rtc@51 {
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+ compatible = "analogtek,at8563", "nxp,pcf8563";
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+ reg = <0x51>;
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+ #clock-cells = <0>;
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+ interrupts-extended = <&gpio 40 IRQ_TYPE_LEVEL_LOW>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&rtc_int_gpio>;
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+ };
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+};
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+
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+&xgmac0 {
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+ status = "okay";
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+ phy-handle = <&phy1>;
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+ nvmem-cells = <&macaddr_factory_0 0>;
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+ nvmem-cell-names = "mac-address";
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+};
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+
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+&xgmac1 {
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+ status = "okay";
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+ phy-handle = <&phy2>;
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+ nvmem-cells = <&macaddr_factory_0 0>;
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+ nvmem-cell-names = "mac-address";
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+};
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+
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+&xgmac2 {
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+ status = "okay";
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+ phy-handle = <&phy3>;
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+ nvmem-cells = <&macaddr_factory_0 0>;
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+ nvmem-cell-names = "mac-address";
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+};
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+
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+&xgmac3 {
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+ status = "okay";
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+ phy-handle = <&phy4>;
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+ nvmem-cells = <&macaddr_factory_0 0>;
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+ nvmem-cell-names = "mac-address";
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+};
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+
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+&xgmac4 {
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+ status = "okay";
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+ phy-handle = <&phy15>;
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+ nvmem-cells = <&macaddr_factory_0 1>;
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+ nvmem-cell-names = "mac-address";
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+ mac-address-increment = <1>;
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+ /delete-property/ pinctrl-0;
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+};
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+
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+&xgmac5 {
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+ status = "okay";
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+ tx-internal-delay-ps = <2499>;
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+ rx-internal-delay-ps = <1519>;
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+ phy-mode = "rgmii-txid";
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+ phy-handle = <&phy6>;
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+ nvmem-cells = <&macaddr_factory_0 0>;
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+ nvmem-cell-names = "mac-address";
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+};
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+
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+&mdio0 {
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+ reset-gpios = <&gpio 30 GPIO_ACTIVE_LOW>;
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+ reset-delay-us = <10000>;
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+ reset-post-delay-us = <100000>;
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+
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+ phy1: ethernet-phy@1 {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ reg = <0x1>;
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+ };
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+
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+ phy2: ethernet-phy@2 {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ reg = <0x2>;
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+ };
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+
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+ phy3: ethernet-phy@3 {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ reg = <0x3>;
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+ };
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+
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+ phy4: ethernet-phy@4 {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ reg = <0x4>;
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+ };
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+
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+ phy6: ethernet-phy@6 {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ reg = <0x6>;
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+ reset-gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
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+ reset-assert-us = <10000>;
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+ reset-deassert-us = <100000>;
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+ };
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+
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+ phy15: ethernet-phy@f {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ reg = <0xf>;
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+ reset-gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
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+ reset-assert-us = <10000>;
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+ reset-deassert-us = <100000>;
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+ };
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+};
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+
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+&pcie_phy {
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+ status = "okay";
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+};
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+
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+/*
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+ * M.2 Key B slot. Other GPIO pins connected to the slot:
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+ * GPIO0: WAKEUP
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+ * GPIO8: W_DISABLE
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+ * GPIO10: CLKREQ_N
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+ * GPIO38: FULL_CARD_POFF
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+ */
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+&pcie0 {
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+ reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
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+ status = "okay";
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+};
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+
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+/*
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+ * MiniPCIE slot. Other GPIO pins connected to the slot:
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+ * GPIO11: PEWAKE
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+ * GPIO12: CLKREQ_N
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+ */
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+&pcie1 {
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+ reset-gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
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+ status = "okay";
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+};
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+
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+&usb_phy {
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+ status = "okay";
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+};
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+
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+&usb {
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+ status = "okay";
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+};
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+
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+&dpns {
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+ status = "okay";
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+};
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+
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+&edma {
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+ status = "okay";
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+};
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+
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+&qsgmii_pcs {
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+ status = "okay";
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+};
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+
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+&sgmii_pcs {
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+ status = "okay";
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+};
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