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@@ -0,0 +1,79 @@
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+From d86b202436b6f3111c4c37b8701daa0764d2ca55 Mon Sep 17 00:00:00 2001
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+From: Tim Harvey <[email protected]>
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+Date: Thu, 5 Nov 2015 11:10:00 -0800
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+Subject: [PATCH 3/3] ARM: dts: imx: ventana: Allow HDMI and LVDS to work
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+ simultaneously
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+
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+Currently it is not possible to have HDMI and LVDS working simultaneously,
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+because both ports try to use PLL5.
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+
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+Move the LVDS clock parent to PLL3_USB_OTG, so that HDMI and LVDS can be
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+driven from independent sources.
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+
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+With this change the LDB pixel clock goes to 68.57 MHz, which is still
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+within the valid range for the displays supported by the Ventana boards.
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+
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+Signed-off-by: Tim Harvey <[email protected]>
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+---
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+ arch/arm/boot/dts/imx6qdl-gw52xx.dtsi | 7 +++++++
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+ arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | 7 +++++++
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+ arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 7 +++++++
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+ 3 files changed, 21 insertions(+)
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+
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+diff --git a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
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+index 1b66328..9709728 100644
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+--- a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
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++++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
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+@@ -151,6 +151,13 @@
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+ status = "okay";
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+ };
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+
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++&clks {
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++ assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
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++ <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
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++ assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
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++ <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
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++};
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++
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+ &fec {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_enet>;
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+diff --git a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
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+index 5172de0..dc1cd13 100644
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+--- a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
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++++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
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+@@ -152,6 +152,13 @@
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+ status = "okay";
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+ };
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+
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++&clks {
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++ assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
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++ <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
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++ assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
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++ <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
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++};
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++
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+ &fec {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_enet>;
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+diff --git a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
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+index 77a56be..7ef9fbe 100644
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+--- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
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++++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
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+@@ -142,6 +142,13 @@
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+ status = "okay";
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+ };
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+
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++&clks {
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++ assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
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++ <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
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++ assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
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++ <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
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++};
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++
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+ &fec {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_enet>;
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+--
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+1.9.1
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+
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