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@@ -0,0 +1,33 @@
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+From 98bc223d174c7f544e8f6c4f0caa8fa144f2f4dc Mon Sep 17 00:00:00 2001
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+From: Christian Marangi <[email protected]>
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+Date: Fri, 28 Jun 2024 12:55:40 +0200
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+Subject: [PATCH 2/2] arm64: dts: mediatek: mt7622: readd syscon to pciesys
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+ node
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+
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+Sata node reference the pciesys with the property mediatek,phy-node
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+and that is used as a syscon to access the pciesys regs.
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+
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+Readd the syscon compatible to pciesys node to restore correct
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+functionality of the SATA interface.
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+
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+Fixes: 3ba5a6159434 ("arm64: dts: mediatek: mt7622: fix clock controllers")
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+Reported-by: Frank Wunderlich <[email protected]>
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+Co-developed-by: Frank Wunderlich <[email protected]>
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+Signed-off-by: Frank Wunderlich <[email protected]>
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+Signed-off-by: Christian Marangi <[email protected]>
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+Cc: [email protected]
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+---
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+ arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 +-
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+ 1 file changed, 1 insertion(+), 1 deletion(-)
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+
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+--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
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++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
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+@@ -798,7 +798,7 @@
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+ };
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+
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+ pciesys: clock-controller@1a100800 {
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+- compatible = "mediatek,mt7622-pciesys";
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++ compatible = "mediatek,mt7622-pciesys", "syscon";
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+ reg = <0 0x1a100800 0 0x1000>;
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+ #clock-cells = <1>;
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+ #reset-cells = <1>;
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