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@@ -0,0 +1,48 @@
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+/*
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+ * Arch specific code for ramips based boards
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+ *
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+ * Copyright (C) 2013 John Crispin <[email protected]>
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+ * Copyright (C) 2018 Tobias Schramm <[email protected]>
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+ * Copyright (C) 2023 Antonio Vázquez <[email protected]>
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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+ * by the Free Software Foundation.
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+ */
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+
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+#include <stdint.h>
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+
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+#if defined(SOC_MT7620) || defined(SOC_RT3883)
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+#define UART_BASE 0xb0000c00
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+#define UART_THR (UART_BASE + 0x04)
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+#define UART_LSR (UART_BASE + 0x1c)
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+#define UART_LSR_THRE_MASK 0x40
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+#elif defined(SOC_MT7621)
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+#define UART_BASE 0xbe000c00
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+#define UART_THR (UART_BASE + 0x00)
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+#define UART_LSR (UART_BASE + 0x14)
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+#define UART_LSR_THRE_MASK 0x20
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+#elif defined(SOC_RT305X)
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+#define UART_BASE 0x10000500
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+#define UART_THR (UART_BASE + 0x04)
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+#define UART_LSR (UART_BASE + 0x1c)
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+#define UART_LSR_THRE_MASK 0x20
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+#else
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+#error "Unsupported SOC..."
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+#endif
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+
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+// Helper functions
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+#define READREG(r) (*(volatile uint32_t *)(r))
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+#define WRITEREG(r,v) (*(volatile uint32_t *)(r)) = v
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+
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+
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+void board_init(void)
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+{
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+}
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+
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+void board_putc(int ch)
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+{
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+ while ((READREG(UART_LSR) & UART_LSR_THRE_MASK) == 0);
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+ WRITEREG(UART_THR, ch);
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+ while ((READREG(UART_LSR) & UART_LSR_THRE_MASK) == 0);
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+}
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