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@@ -1,98 +0,0 @@
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-From bdae481e89cbe551068a99028bb57119b59f5ff4 Mon Sep 17 00:00:00 2001
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-From: Robert Marko <[email protected]>
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-Date: Tue, 26 Mar 2024 12:19:49 +0100
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-Subject: [PATCH] mdio: adapt to C22 and C45 read/write split
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-
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-Kernel 6.3 has introduced separate C45 read/write operations, and thus
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-split them out of the C22 operations completely so the old way of marking
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-C45 reads and writes via the register value does not work anymore.
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-
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-This is causing SSDK to fail and find C45 only PHY-s such as Aquantia ones:
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-[ 22.187877] ssdk_phy_driver_init[371]:INFO:dev_id = 0, phy_adress = 8, phy_id = 0x0 phytype doesn't match
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-[ 22.209924] ssdk_phy_driver_init[371]:INFO:dev_id = 0, phy_adress = 0, phy_id = 0x0 phytype doesn't match
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-
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-This in turn causes USXGMII MAC autoneg bit to not get set and then UNIPHY
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-autoneg will time out, causing the 10G ports not to work:
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-[ 37.292784] uniphy autoneg time out!
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-
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-So, lets detect C45 reads and writes by the magic BIT(30) in the register
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-argument and if so call separate C45 mdiobus read/write functions.
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-
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-Signed-off-by: Robert Marko <[email protected]>
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----
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- include/init/ssdk_plat.h | 7 +++++++
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- src/init/ssdk_plat.c | 30 ++++++++++++++++++++++++++++++
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- 2 files changed, 37 insertions(+)
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-
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---- a/include/init/ssdk_plat.h
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-+++ b/include/init/ssdk_plat.h
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-@@ -505,3 +505,10 @@ void ssdk_plat_exit(a_uint32_t dev_id);
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-
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- #endif
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- /*qca808x_end*/
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-+
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-+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6,3,0))
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-+#define MII_ADDR_C45 (1<<30)
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-+#define MII_DEVADDR_C45_SHIFT 16
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-+#define MII_DEVADDR_C45_MASK GENMASK(20, 16)
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-+#define MII_REGADDR_C45_MASK GENMASK(15, 0)
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-+#endif
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---- a/src/init/ssdk_plat.c
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-+++ b/src/init/ssdk_plat.c
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-@@ -356,6 +356,18 @@ phy_addr_validation_check(a_uint32_t phy
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- return A_TRUE;
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- }
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-
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-+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6,3,0))
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-+static inline u16 mdiobus_c45_regad(u32 regnum)
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-+{
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-+ return FIELD_GET(MII_REGADDR_C45_MASK, regnum);
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-+}
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-+
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-+static inline u16 mdiobus_c45_devad(u32 regnum)
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-+{
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-+ return FIELD_GET(MII_DEVADDR_C45_MASK, regnum);
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-+}
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-+#endif
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-+
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- sw_error_t
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- qca_ar8327_phy_read(a_uint32_t dev_id, a_uint32_t phy_addr,
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- a_uint32_t reg, a_uint16_t* data)
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-@@ -371,9 +383,18 @@ qca_ar8327_phy_read(a_uint32_t dev_id, a
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- if (!bus)
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- return SW_NOT_SUPPORTED;
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- phy_addr = TO_PHY_ADDR(phy_addr);
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-+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6,3,0))
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-+ mutex_lock(&bus->mdio_lock);
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-+ if (reg & MII_ADDR_C45)
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-+ *data = __mdiobus_c45_read(bus, phy_addr, mdiobus_c45_devad(reg), mdiobus_c45_regad(reg));
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-+ else
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-+ *data = __mdiobus_read(bus, phy_addr, reg);
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-+ mutex_unlock(&bus->mdio_lock);
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-+#else
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- mutex_lock(&bus->mdio_lock);
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- *data = __mdiobus_read(bus, phy_addr, reg);
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- mutex_unlock(&bus->mdio_lock);
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-+#endif
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-
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- return 0;
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- }
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-@@ -393,9 +414,18 @@ qca_ar8327_phy_write(a_uint32_t dev_id,
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- if (!bus)
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- return SW_NOT_SUPPORTED;
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- phy_addr = TO_PHY_ADDR(phy_addr);
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-+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6,3,0))
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-+ mutex_lock(&bus->mdio_lock);
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-+ if (reg & MII_ADDR_C45)
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-+ __mdiobus_c45_write(bus, phy_addr, mdiobus_c45_devad(reg), mdiobus_c45_regad(reg), data);
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-+ else
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-+ __mdiobus_write(bus, phy_addr, reg, data);
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-+ mutex_unlock(&bus->mdio_lock);
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-+#else
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- mutex_lock(&bus->mdio_lock);
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- __mdiobus_write(bus, phy_addr, reg, data);
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- mutex_unlock(&bus->mdio_lock);
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-+#endif
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-
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- return 0;
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- }
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Sean Khan