realtek: align declaration/static/extern function definitions for dsa driver

In 2023 upstream has tightened compiler checks with this patch
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit
/scripts/Makefile.extrawarn?h=v6.15&id=0fcb70851fbfea1776ae62f67c503fef8f0292b9

A consistent function definition is now needed. I.e.

- functions must be either declared with "static" or
- functions need an additional declaration (in the header file)

Before upgrading the Realtek target to 6.12 clean the code so that the main
6.12 PR can focus on real issues from the version bump.

Signed-off-by: Markus Stockhausen <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/18925
Signed-off-by: Robert Marko <[email protected]>

target/linux/realtek/files-6.6/drivers/net/dsa/rtl83xx/common.c

@@ -627,7 +627,7 @@ int rtl83xx_packet_cntr_alloc(struct rtl838x_switch_priv *priv)
  * Called from the L3 layer
  * The index in the L2 hash table is filled into nh->l2_id;
  */
-int rtl83xx_l2_nexthop_add(struct rtl838x_switch_priv *priv, struct rtl83xx_nexthop *nh)
+static int rtl83xx_l2_nexthop_add(struct rtl838x_switch_priv *priv, struct rtl83xx_nexthop *nh)
 {
 	struct rtl838x_l2_entry e;
 	u64 seed = priv->r->l2_hash_seed(nh->mac, nh->rvid);
@@ -694,7 +694,7 @@ int rtl83xx_l2_nexthop_add(struct rtl838x_switch_priv *priv, struct rtl83xx_next
  * If it was static, the entire entry is removed, otherwise the nexthop bit is cleared
  * and we wait until the entry ages out
  */
-int rtl83xx_l2_nexthop_rm(struct rtl838x_switch_priv *priv, struct rtl83xx_nexthop *nh)
+static int rtl83xx_l2_nexthop_rm(struct rtl838x_switch_priv *priv, struct rtl83xx_nexthop *nh)
 {
 	struct rtl838x_l2_entry e;
 	u32 key = nh->l2_id >> 2;
@@ -819,7 +819,7 @@ static int rtl83xx_netdevice_event(struct notifier_block *this,
 	return NOTIFY_DONE;
 }
 
-const static struct rhashtable_params route_ht_params = {
+static const struct rhashtable_params route_ht_params = {
 	.key_len     = sizeof(u32),
 	.key_offset  = offsetof(struct rtl83xx_route, gw_ip),
 	.head_offset = offsetof(struct rtl83xx_route, linkage),
@@ -954,7 +954,7 @@ static int rtl83xx_port_lower_walk(struct net_device *lower, struct netdev_neste
 	return ret;
 }
 
-int rtl83xx_port_dev_lower_find(struct net_device *dev, struct rtl838x_switch_priv *priv)
+static int rtl83xx_port_dev_lower_find(struct net_device *dev, struct rtl838x_switch_priv *priv)
 {
 	struct rtl83xx_walk_data data;
 	struct netdev_nested_priv _priv;

target/linux/realtek/files-6.6/drivers/net/dsa/rtl83xx/debugfs.c

@@ -37,15 +37,6 @@
 #define RTL930X_STAT_PRVTE_DROP_COUNTERS	(0xB5B8)
 #define RTL931X_STAT_PRVTE_DROP_COUNTERS	(0xd800)
 
-int rtl83xx_port_get_stp_state(struct rtl838x_switch_priv *priv, int port);
-void rtl83xx_port_stp_state_set(struct dsa_switch *ds, int port, u8 state);
-void rtl83xx_fast_age(struct dsa_switch *ds, int port);
-u32 rtl838x_get_egress_rate(struct rtl838x_switch_priv *priv, int port);
-u32 rtl839x_get_egress_rate(struct rtl838x_switch_priv *priv, int port);
-int rtl838x_set_egress_rate(struct rtl838x_switch_priv *priv, int port, u32 rate);
-int rtl839x_set_egress_rate(struct rtl838x_switch_priv *priv, int port, u32 rate);
-
-
 const char *rtl838x_drop_cntr[] = {
     "ALE_TX_GOOD_PKTS", "MAC_RX_DROP", "ACL_FWD_DROP", "HW_ATTACK_PREVENTION_DROP",
     "RMA_DROP", "VLAN_IGR_FLTR_DROP", "INNER_OUTER_CFI_EQUAL_1_DROP", "PORT_MOVE_DROP",
@@ -449,7 +440,7 @@ static const struct debugfs_reg32 port_ctrl_regs[] = {
 	{ .name = "mac_force_mode", .offset = RTL838X_MAC_FORCE_MODE_CTRL, },
 };
 
-void rtl838x_dbgfs_cleanup(struct rtl838x_switch_priv *priv)
+static void rtl838x_dbgfs_cleanup(struct rtl838x_switch_priv *priv)
 {
 	debugfs_remove_recursive(priv->dbgfs_dir);
 

target/linux/realtek/files-6.6/drivers/net/dsa/rtl83xx/dsa.c

@@ -1343,7 +1343,7 @@ void rtl83xx_fast_age(struct dsa_switch *ds, int port)
 	mutex_unlock(&priv->reg_mutex);
 }
 
-void rtl931x_fast_age(struct dsa_switch *ds, int port)
+static void rtl931x_fast_age(struct dsa_switch *ds, int port)
 {
 	struct rtl838x_switch_priv *priv = ds->priv;
 
@@ -1358,7 +1358,7 @@ void rtl931x_fast_age(struct dsa_switch *ds, int port)
 	mutex_unlock(&priv->reg_mutex);
 }
 
-void rtl930x_fast_age(struct dsa_switch *ds, int port)
+static void rtl930x_fast_age(struct dsa_switch *ds, int port)
 {
 	struct rtl838x_switch_priv *priv = ds->priv;
 
@@ -1862,7 +1862,7 @@ out:
 	return err;
 }
 
-int rtl83xx_port_mdb_del(struct dsa_switch *ds, int port,
+static int rtl83xx_port_mdb_del(struct dsa_switch *ds, int port,
 			 const struct switchdev_obj_port_mdb *mdb,
 			 const struct dsa_db db)
 {
@@ -2171,7 +2171,7 @@ out:
 	return 0;
 }
 
-int dsa_phy_read(struct dsa_switch *ds, int phy_addr, int phy_reg)
+static int rtl83xx_dsa_phy_read(struct dsa_switch *ds, int phy_addr, int phy_reg)
 {
 	u32 val;
 	u32 offset = 0;
@@ -2190,7 +2190,7 @@ int dsa_phy_read(struct dsa_switch *ds, int phy_addr, int phy_reg)
 	return val;
 }
 
-int dsa_phy_write(struct dsa_switch *ds, int phy_addr, int phy_reg, u16 val)
+static int rtl83xx_dsa_phy_write(struct dsa_switch *ds, int phy_addr, int phy_reg, u16 val)
 {
 	u32 offset = 0;
 	struct rtl838x_switch_priv *priv = ds->priv;
@@ -2217,8 +2217,8 @@ const struct dsa_switch_ops rtl83xx_switch_ops = {
 	.get_tag_protocol	= rtl83xx_get_tag_protocol,
 	.setup			= rtl83xx_setup,
 
-	.phy_read		= dsa_phy_read,
-	.phy_write		= dsa_phy_write,
+	.phy_read		= rtl83xx_dsa_phy_read,
+	.phy_write		= rtl83xx_dsa_phy_write,
 
 	.phylink_get_caps	= rtl83xx_phylink_get_caps,
 	.phylink_mac_config	= rtl83xx_phylink_mac_config,
@@ -2275,8 +2275,8 @@ const struct dsa_switch_ops rtl930x_switch_ops = {
 	.get_tag_protocol	= rtl83xx_get_tag_protocol,
 	.setup			= rtl93xx_setup,
 
-	.phy_read		= dsa_phy_read,
-	.phy_write		= dsa_phy_write,
+	.phy_read		= rtl83xx_dsa_phy_read,
+	.phy_write		= rtl83xx_dsa_phy_write,
 
 	.phylink_get_caps	= rtl83xx_phylink_get_caps,
 	.phylink_mac_config	= rtl93xx_phylink_mac_config,

target/linux/realtek/files-6.6/drivers/net/dsa/rtl83xx/qos.c

@@ -188,7 +188,7 @@ int rtl839x_set_egress_rate(struct rtl838x_switch_priv *priv, int port, u32 rate
 /* Set the rate limit for a particular queue in Bits/s
  * units of the rate is 16Kbps
  */
-void rtl839x_egress_rate_queue_limit(struct rtl838x_switch_priv *priv, int port,
+static void rtl839x_egress_rate_queue_limit(struct rtl838x_switch_priv *priv, int port,
 					int queue, u32 rate)
 {
 	int lsb = 128 + queue * 20;
@@ -289,7 +289,7 @@ static void rtl839x_rate_control_init(struct rtl838x_switch_priv *priv)
 
 
 
-void rtl838x_setup_prio2queue_matrix(int *min_queues)
+static void rtl838x_setup_prio2queue_matrix(int *min_queues)
 {
 	u32 v = 0;
 
@@ -299,7 +299,7 @@ void rtl838x_setup_prio2queue_matrix(int *min_queues)
 	sw_w32(v, RTL838X_QM_INTPRI2QID_CTRL);
 }
 
-void rtl839x_setup_prio2queue_matrix(int *min_queues)
+static void rtl839x_setup_prio2queue_matrix(int *min_queues)
 {
 	pr_info("Current Intprio2queue setting: %08x\n", sw_r32(RTL839X_QM_INTPRI2QID_CTRL(0)));
 	for (int i = 0; i < MAX_PRIOS; i++) {
@@ -309,7 +309,7 @@ void rtl839x_setup_prio2queue_matrix(int *min_queues)
 }
 
 /* Sets the CPU queue depending on the internal priority of a packet */
-void rtl83xx_setup_prio2queue_cpu_matrix(int *max_queues)
+static void rtl83xx_setup_prio2queue_cpu_matrix(int *max_queues)
 {
 	int reg = soc_info.family == RTL8380_FAMILY_ID ? RTL838X_QM_PKT2CPU_INTPRI_MAP
 					: RTL839X_QM_PKT2CPU_INTPRI_MAP;
@@ -321,7 +321,7 @@ void rtl83xx_setup_prio2queue_cpu_matrix(int *max_queues)
 	sw_w32(v, reg);
 }
 
-void rtl83xx_setup_default_prio2queue(void)
+static void rtl83xx_setup_default_prio2queue(void)
 {
 	if (soc_info.family == RTL8380_FAMILY_ID) {
 		rtl838x_setup_prio2queue_matrix(max_available_queue);
@@ -338,7 +338,7 @@ void rtl839x_set_egress_queue(int port, int queue)
 }
 
 /* Sets the priority assigned of an ingress port, the port can be the CPU-port */
-void rtl83xx_set_ingress_priority(int port, int priority)
+static void rtl83xx_set_ingress_priority(int port, int priority)
 {
 	if (soc_info.family == RTL8380_FAMILY_ID)
 		sw_w32(priority << ((port % 10) *3), RTL838X_PRI_SEL_PORT_PRI(port));
@@ -346,7 +346,7 @@ void rtl83xx_set_ingress_priority(int port, int priority)
 		sw_w32(priority << ((port % 10) *3), RTL839X_PRI_SEL_PORT_PRI(port));
 }
 
-int rtl839x_get_scheduling_algorithm(struct rtl838x_switch_priv *priv, int port)
+static int rtl839x_get_scheduling_algorithm(struct rtl838x_switch_priv *priv, int port)
 {
 	u32 v;
 
@@ -363,7 +363,7 @@ int rtl839x_get_scheduling_algorithm(struct rtl838x_switch_priv *priv, int port)
 	return WEIGHTED_FAIR_QUEUE;
 }
 
-void rtl839x_set_scheduling_algorithm(struct rtl838x_switch_priv *priv, int port,
+static void rtl839x_set_scheduling_algorithm(struct rtl838x_switch_priv *priv, int port,
 				      enum scheduler_type sched)
 {
 	enum scheduler_type t = rtl839x_get_scheduling_algorithm(priv, port);
@@ -421,7 +421,7 @@ void rtl839x_set_scheduling_algorithm(struct rtl838x_switch_priv *priv, int port
 	mutex_unlock(&priv->reg_mutex);
 }
 
-void rtl839x_set_scheduling_queue_weights(struct rtl838x_switch_priv *priv, int port,
+static void rtl839x_set_scheduling_queue_weights(struct rtl838x_switch_priv *priv, int port,
 					  int *queue_weights)
 {
 	mutex_lock(&priv->reg_mutex);
@@ -445,7 +445,7 @@ void rtl839x_set_scheduling_queue_weights(struct rtl838x_switch_priv *priv, int
 	mutex_unlock(&priv->reg_mutex);
 }
 
-void rtl838x_config_qos(void)
+static void rtl838x_config_qos(void)
 {
 	u32 v;
 
@@ -490,7 +490,7 @@ void rtl838x_config_qos(void)
 	sw_w32_mask(0, 7, RTL838X_QM_PKT2CPU_INTPRI_1);
 }
 
-void rtl839x_config_qos(void)
+static void rtl839x_config_qos(void)
 {
 	u32 v;
 	struct rtl838x_switch_priv *priv = switch_priv;

target/linux/realtek/files-6.6/drivers/net/dsa/rtl83xx/rtl838x.c

@@ -577,22 +577,22 @@ static void rtl838x_stp_set(struct rtl838x_switch_priv *priv, u16 msti, u32 port
 	priv->r->exec_tbl0_cmd(cmd);
 }
 
-u64 rtl838x_traffic_get(int source)
+static u64 rtl838x_traffic_get(int source)
 {
 	return rtl838x_get_port_reg(rtl838x_port_iso_ctrl(source));
 }
 
-void rtl838x_traffic_set(int source, u64 dest_matrix)
+static void rtl838x_traffic_set(int source, u64 dest_matrix)
 {
 	rtl838x_set_port_reg(dest_matrix, rtl838x_port_iso_ctrl(source));
 }
 
-void rtl838x_traffic_enable(int source, int dest)
+static void rtl838x_traffic_enable(int source, int dest)
 {
 	rtl838x_mask_port_reg(0, BIT(dest), rtl838x_port_iso_ctrl(source));
 }
 
-void rtl838x_traffic_disable(int source, int dest)
+static void rtl838x_traffic_disable(int source, int dest)
 {
 	rtl838x_mask_port_reg(BIT(dest), 0, rtl838x_port_iso_ctrl(source));
 }
@@ -1606,7 +1606,7 @@ static int rtl838x_l3_setup(struct rtl838x_switch_priv *priv)
 	return 0;
 }
 
-void rtl838x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
+static void rtl838x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
 {
 	sw_w32(FIELD_PREP(RTL838X_VLAN_PORT_TAG_STS_CTRL_OTAG_STS_MASK,
 			  keep_outer ? RTL838X_VLAN_PORT_TAG_STS_TAGGED : RTL838X_VLAN_PORT_TAG_STS_UNTAG) |
@@ -1615,7 +1615,7 @@ void rtl838x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
 	       RTL838X_VLAN_PORT_TAG_STS_CTRL(port));
 }
 
-void rtl838x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode)
+static void rtl838x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode)
 {
 	if (type == PBVLAN_TYPE_INNER)
 		sw_w32_mask(0x3, mode, RTL838X_VLAN_PORT_PB_VLAN + (port << 2));
@@ -1623,7 +1623,7 @@ void rtl838x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan
 		sw_w32_mask(0x3 << 14, mode << 14, RTL838X_VLAN_PORT_PB_VLAN + (port << 2));
 }
 
-void rtl838x_vlan_port_pvid_set(int port, enum pbvlan_type type, int pvid)
+static void rtl838x_vlan_port_pvid_set(int port, enum pbvlan_type type, int pvid)
 {
 	if (type == PBVLAN_TYPE_INNER)
 		sw_w32_mask(0xfff << 2, pvid << 2, RTL838X_VLAN_PORT_PB_VLAN + (port << 2));
@@ -1659,7 +1659,7 @@ static void rtl838x_set_egr_filter(int port, enum egr_filter state)
 		    RTL838X_VLAN_PORT_EGR_FLTR + (((port / 29) << 2)));
 }
 
-void rtl838x_set_distribution_algorithm(int group, int algoidx, u32 algomsk)
+static void rtl838x_set_distribution_algorithm(int group, int algoidx, u32 algomsk)
 {
 	algoidx &= 1; /* RTL838X only supports 2 concurrent algorithms */
 	sw_w32_mask(1 << (group % 8), algoidx << (group % 8),
@@ -1667,7 +1667,7 @@ void rtl838x_set_distribution_algorithm(int group, int algoidx, u32 algomsk)
 	sw_w32(algomsk, RTL838X_TRK_HASH_CTRL + (algoidx << 2));
 }
 
-void rtl838x_set_receive_management_action(int port, rma_ctrl_t type, action_type_t action)
+static void rtl838x_set_receive_management_action(int port, rma_ctrl_t type, action_type_t action)
 {
 	switch(type) {
 	case BPDU:

target/linux/realtek/files-6.6/drivers/net/dsa/rtl83xx/rtl839x.c

@@ -529,22 +529,22 @@ static void rtl839x_vlan_profile_setup(int profile)
 	rtl839x_write_mcast_pmask(UNKNOWN_MC_PMASK, 0x001fffffffffffff);
 }
 
-u64 rtl839x_traffic_get(int source)
+static u64 rtl839x_traffic_get(int source)
 {
 	return rtl839x_get_port_reg_be(rtl839x_port_iso_ctrl(source));
 }
 
-void rtl839x_traffic_set(int source, u64 dest_matrix)
+static void rtl839x_traffic_set(int source, u64 dest_matrix)
 {
 	rtl839x_set_port_reg_be(dest_matrix, rtl839x_port_iso_ctrl(source));
 }
 
-void rtl839x_traffic_enable(int source, int dest)
+static void rtl839x_traffic_enable(int source, int dest)
 {
 	rtl839x_mask_port_reg_be(0, BIT_ULL(dest), rtl839x_port_iso_ctrl(source));
 }
 
-void rtl839x_traffic_disable(int source, int dest)
+static void rtl839x_traffic_disable(int source, int dest)
 {
 	rtl839x_mask_port_reg_be(BIT_ULL(dest), 0, rtl839x_port_iso_ctrl(source));
 }
@@ -858,7 +858,7 @@ static void rtl839x_stp_set(struct rtl838x_switch_priv *priv, u16 msti, u32 port
 }
 
 /* Enables or disables the EEE/EEEP capability of a port */
-void rtl839x_port_eee_set(struct rtl838x_switch_priv *priv, int port, bool enable)
+static void rtl839x_port_eee_set(struct rtl838x_switch_priv *priv, int port, bool enable)
 {
 	u32 v;
 
@@ -881,7 +881,7 @@ void rtl839x_port_eee_set(struct rtl838x_switch_priv *priv, int port, bool enabl
 }
 
 /* Get EEE own capabilities and negotiation result */
-int rtl839x_eee_port_ability(struct rtl838x_switch_priv *priv, struct ethtool_eee *e, int port)
+static int rtl839x_eee_port_ability(struct rtl838x_switch_priv *priv, struct ethtool_eee *e, int port)
 {
 	u64 link, a;
 
@@ -1127,7 +1127,7 @@ static void rtl839x_write_pie_templated(u32 r[], struct pie_rule *pr, enum templ
  * however the RTL9310 has 2 more registers / fields and the physical field-ids
  * On the RTL8390 the template mask registers are not word-aligned!
  */
-void rtl839x_read_pie_templated(u32 r[], struct pie_rule *pr, enum template_field_id t[])
+static void rtl839x_read_pie_templated(u32 r[], struct pie_rule *pr, enum template_field_id t[])
 {
 	for (int i = 0; i < N_FIXED_FIELDS; i++) {
 		enum template_field_id field_type = t[i];
@@ -1400,7 +1400,7 @@ static void rtl839x_read_pie_action(u32 r[],  struct pie_rule *pr)
 	pr->bypass_ibc_sc = r[16] & BIT(7);
 }
 
-void rtl839x_pie_rule_dump_raw(u32 r[])
+static void rtl839x_pie_rule_dump_raw(u32 r[])
 {
 	pr_debug("Raw IACL table entry:\n");
 	pr_debug("Match  : %08x %08x %08x %08x %08x %08x\n", r[0], r[1], r[2], r[3], r[4], r[5]);
@@ -1736,14 +1736,14 @@ static void rtl839x_setup_port_macs(struct rtl838x_switch_priv *priv)
 	}
 }
 
-int rtl839x_l3_setup(struct rtl838x_switch_priv *priv)
+static int rtl839x_l3_setup(struct rtl838x_switch_priv *priv)
 {
 	rtl839x_setup_port_macs(priv);
 
 	return 0;
 }
 
-void rtl839x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
+static void rtl839x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
 {
 	sw_w32(FIELD_PREP(RTL839X_VLAN_PORT_TAG_STS_CTRL_OTAG_STS_MASK,
 			  keep_outer ? RTL839X_VLAN_PORT_TAG_STS_TAGGED : RTL839X_VLAN_PORT_TAG_STS_UNTAG) |
@@ -1752,7 +1752,7 @@ void rtl839x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
 	       RTL839X_VLAN_PORT_TAG_STS_CTRL(port));
 }
 
-void rtl839x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode)
+static void rtl839x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode)
 {
 	if (type == PBVLAN_TYPE_INNER)
 		sw_w32_mask(0x3, mode, RTL839X_VLAN_PORT_PB_VLAN + (port << 2));
@@ -1760,7 +1760,7 @@ void rtl839x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan
 		sw_w32_mask(0x3 << 14, mode << 14, RTL839X_VLAN_PORT_PB_VLAN + (port << 2));
 }
 
-void rtl839x_vlan_port_pvid_set(int port, enum pbvlan_type type, int pvid)
+static void rtl839x_vlan_port_pvid_set(int port, enum pbvlan_type type, int pvid)
 {
 	if (type == PBVLAN_TYPE_INNER)
 		sw_w32_mask(0xfff << 2, pvid << 2, RTL839X_VLAN_PORT_PB_VLAN + (port << 2));
@@ -1796,14 +1796,14 @@ static void rtl839x_set_egr_filter(int port,  enum egr_filter state)
 			RTL839X_VLAN_PORT_EGR_FLTR + (((port >> 5) << 2)));
 }
 
-void rtl839x_set_distribution_algorithm(int group, int algoidx, u32 algomsk)
+static void rtl839x_set_distribution_algorithm(int group, int algoidx, u32 algomsk)
 {
 	sw_w32_mask(3 << ((group & 0xf) << 1), algoidx << ((group & 0xf) << 1),
 		    RTL839X_TRK_HASH_IDX_CTRL + ((group >> 4) << 2));
 	sw_w32(algomsk, RTL839X_TRK_HASH_CTRL + (algoidx << 2));
 }
 
-void rtl839x_set_receive_management_action(int port, rma_ctrl_t type, action_type_t action)
+static void rtl839x_set_receive_management_action(int port, rma_ctrl_t type, action_type_t action)
 {
 	switch(type) {
 	case BPDU:

target/linux/realtek/files-6.6/drivers/net/dsa/rtl83xx/rtl83xx.h

@@ -75,32 +75,38 @@ inline void rtl_table_data_w(struct table_reg *r, u32 v, int i);
 
 void __init rtl83xx_setup_qos(struct rtl838x_switch_priv *priv);
 
+void rtl83xx_fast_age(struct dsa_switch *ds, int port);
 int rtl83xx_packet_cntr_alloc(struct rtl838x_switch_priv *priv);
-
+int rtl83xx_port_get_stp_state(struct rtl838x_switch_priv *priv, int port);
 int rtl83xx_port_is_under(const struct net_device * dev, struct rtl838x_switch_priv *priv);
+void rtl83xx_port_stp_state_set(struct dsa_switch *ds, int port, u8 state);
+int rtl83xx_setup_tc(struct net_device *dev, enum tc_setup_type type, void *type_data);
 
 int read_phy(u32 port, u32 page, u32 reg, u32 *val);
 int write_phy(u32 port, u32 page, u32 reg, u32 val);
 
 /* Port register accessor functions for the RTL839x and RTL931X SoCs */
 void rtl839x_mask_port_reg_be(u64 clear, u64 set, int reg);
+u32 rtl839x_get_egress_rate(struct rtl838x_switch_priv *priv, int port);
 u64 rtl839x_get_port_reg_be(int reg);
 void rtl839x_set_port_reg_be(u64 set, int reg);
 void rtl839x_mask_port_reg_le(u64 clear, u64 set, int reg);
+int rtl839x_set_egress_rate(struct rtl838x_switch_priv *priv, int port, u32 rate);
 void rtl839x_set_port_reg_le(u64 set, int reg);
 u64 rtl839x_get_port_reg_le(int reg);
 
 /* Port register accessor functions for the RTL838x and RTL930X SoCs */
 void rtl838x_mask_port_reg(u64 clear, u64 set, int reg);
 void rtl838x_set_port_reg(u64 set, int reg);
+u32 rtl838x_get_egress_rate(struct rtl838x_switch_priv *priv, int port);
 u64 rtl838x_get_port_reg(int reg);
+int rtl838x_set_egress_rate(struct rtl838x_switch_priv *priv, int port, u32 rate);
 
 /* RTL838x-specific */
 u32 rtl838x_hash(struct rtl838x_switch_priv *priv, u64 seed);
 irqreturn_t rtl838x_switch_irq(int irq, void *dev_id);
 void rtl8380_get_version(struct rtl838x_switch_priv *priv);
 void rtl838x_vlan_profile_dump(int index);
-int rtl83xx_dsa_phy_read(struct dsa_switch *ds, int phy_addr, int phy_reg);
 void rtl8380_sds_rst(int mac);
 int rtl8380_sds_power(int mac, int val);
 void rtl838x_print_matrix(void);
@@ -110,7 +116,6 @@ u32 rtl839x_hash(struct rtl838x_switch_priv *priv, u64 seed);
 irqreturn_t rtl839x_switch_irq(int irq, void *dev_id);
 void rtl8390_get_version(struct rtl838x_switch_priv *priv);
 void rtl839x_vlan_profile_dump(int index);
-int rtl83xx_dsa_phy_write(struct dsa_switch *ds, int phy_addr, int phy_reg, u16 val);
 void rtl839x_exec_tbl2_cmd(u32 cmd);
 void rtl839x_print_matrix(void);
 
@@ -120,17 +125,50 @@ irqreturn_t rtl930x_switch_irq(int irq, void *dev_id);
 irqreturn_t rtl839x_switch_irq(int irq, void *dev_id);
 void rtl930x_vlan_profile_dump(int index);
 int rtl9300_sds_power(int mac, int val);
-void rtl9300_sds_rst(int sds_num, u32 mode);
-int rtl9300_serdes_setup(int port, int sds_num, phy_interface_t phy_mode);
+extern int rtl9300_serdes_setup(int port, int sds_num, phy_interface_t phy_mode);
 void rtl930x_print_matrix(void);
 
 /* RTL931x-specific */
 irqreturn_t rtl931x_switch_irq(int irq, void *dev_id);
 int rtl931x_sds_cmu_band_get(int sds, phy_interface_t mode);
 int rtl931x_sds_cmu_band_set(int sds, bool enable, u32 band, phy_interface_t mode);
-void rtl931x_sds_init(u32 sds, phy_interface_t mode);
+extern void rtl931x_sds_init(u32 sds, phy_interface_t mode);
 
 int rtl83xx_lag_add(struct dsa_switch *ds, int group, int port, struct netdev_lag_upper_info *info);
 int rtl83xx_lag_del(struct dsa_switch *ds, int group, int port);
 
+/* phy functions that will need to be moved to the future mdio driver */
+
+int rtl838x_read_mmd_phy(u32 port, u32 addr, u32 reg, u32 *val);
+int rtl838x_write_mmd_phy(u32 port, u32 addr, u32 reg, u32 val);
+
+int rtl839x_read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val);
+int rtl839x_write_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 val);
+
+int rtl930x_read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val);
+int rtl930x_write_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 val);
+
+int rtl931x_read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val);
+int rtl931x_write_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 val);
+
+/*
+ * TODO: The following functions are currently not in use. So compiler will complain if
+ * they are static and not made available externally. To preserve them for future use
+ * collect them in this section.
+ */
+
+void rtl838x_egress_rate_queue_limit(struct rtl838x_switch_priv *priv, int port,
+				     int queue, u32 rate);
+
+int rtl8390_sds_power(int mac, int val);
+void rtl839x_pie_rule_dump(struct  pie_rule *pr);
+void rtl839x_set_egress_queue(int port, int queue);
+
+void rtl9300_dump_debug(void);
+void rtl930x_pie_rule_dump_raw(u32 r[]);
+
+void rtl931x_print_matrix(void);
+void rtl931x_set_receive_management_action(int port, rma_ctrl_t type, action_type_t action);
+void rtl931x_sw_init(struct rtl838x_switch_priv *priv);
+
 #endif /* _NET_DSA_RTL83XX_H */

target/linux/realtek/files-6.6/drivers/net/dsa/rtl83xx/rtl930x.c

@@ -638,7 +638,7 @@ static void rtl930x_write_mcast_pmask(int idx, u64 portmask)
 	rtl_table_release(q);
 }
 
-u64 rtl930x_traffic_get(int source)
+static u64 rtl930x_traffic_get(int source)
 {
 	u32 v;
 	struct table_reg *r = rtl_table_get(RTL9300_TBL_0, 6);
@@ -652,7 +652,7 @@ u64 rtl930x_traffic_get(int source)
 }
 
 /* Enable traffic between a source port and a destination port matrix */
-void rtl930x_traffic_set(int source, u64 dest_matrix)
+static void rtl930x_traffic_set(int source, u64 dest_matrix)
 {
 	struct table_reg *r = rtl_table_get(RTL9300_TBL_0, 6);
 
@@ -661,7 +661,7 @@ void rtl930x_traffic_set(int source, u64 dest_matrix)
 	rtl_table_release(r);
 }
 
-void rtl930x_traffic_enable(int source, int dest)
+static void rtl930x_traffic_enable(int source, int dest)
 {
 	struct table_reg *r = rtl_table_get(RTL9300_TBL_0, 6);
 	rtl_table_read(r, source);
@@ -670,7 +670,7 @@ void rtl930x_traffic_enable(int source, int dest)
 	rtl_table_release(r);
 }
 
-void rtl930x_traffic_disable(int source, int dest)
+static void rtl930x_traffic_disable(int source, int dest)
 {
 	struct table_reg *r = rtl_table_get(RTL9300_TBL_0, 6);
 	rtl_table_read(r, source);
@@ -892,7 +892,7 @@ u32 rtl930x_hash(struct rtl838x_switch_priv *priv, u64 seed)
 }
 
 /* Enables or disables the EEE/EEEP capability of a port */
-void rtl930x_port_eee_set(struct rtl838x_switch_priv *priv, int port, bool enable)
+static void rtl930x_port_eee_set(struct rtl838x_switch_priv *priv, int port, bool enable)
 {
 	u32 v;
 
@@ -914,7 +914,7 @@ void rtl930x_port_eee_set(struct rtl838x_switch_priv *priv, int port, bool enabl
 }
 
 /* Get EEE own capabilities and negotiation result */
-int rtl930x_eee_port_ability(struct rtl838x_switch_priv *priv, struct ethtool_eee *e, int port)
+static int rtl930x_eee_port_ability(struct rtl838x_switch_priv *priv, struct ethtool_eee *e, int port)
 {
 	u32 link, a;
 
@@ -2204,7 +2204,7 @@ static void rtl930x_set_l3_egress_mac(u32 idx, u64 mac)
  * - The router's MAC address on which routed packets are expected
  * - MAC addresses used as source macs of routed packets
  */
-int rtl930x_l3_setup(struct rtl838x_switch_priv *priv)
+static int rtl930x_l3_setup(struct rtl838x_switch_priv *priv)
 {
 	/* Setup MTU with id 0 for default interface */
 	for (int i = 0; i < MAX_INTF_MTUS; i++)
@@ -2300,7 +2300,7 @@ static void rtl930x_packet_cntr_clear(int counter)
 	rtl_table_release(r);
 }
 
-void rtl930x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
+static void rtl930x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
 {
 	sw_w32(FIELD_PREP(RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_OTAG_STS_MASK,
 			  keep_outer ? RTL930X_VLAN_PORT_TAG_STS_TAGGED : RTL930X_VLAN_PORT_TAG_STS_UNTAG) |
@@ -2309,7 +2309,7 @@ void rtl930x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
 	       RTL930X_VLAN_PORT_TAG_STS_CTRL(port));
 }
 
-void rtl930x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode)
+static void rtl930x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode)
 {
 	if (type == PBVLAN_TYPE_INNER)
 		sw_w32_mask(0x3, mode, RTL930X_VLAN_PORT_PB_VLAN + (port << 2));
@@ -2317,7 +2317,7 @@ void rtl930x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan
 		sw_w32_mask(0x3 << 14, mode << 14 ,RTL930X_VLAN_PORT_PB_VLAN + (port << 2));
 }
 
-void rtl930x_vlan_port_pvid_set(int port, enum pbvlan_type type, int pvid)
+static void rtl930x_vlan_port_pvid_set(int port, enum pbvlan_type type, int pvid)
 {
 	if (type == PBVLAN_TYPE_INNER)
 		sw_w32_mask(0xfff << 2, pvid << 2, RTL930X_VLAN_PORT_PB_VLAN + (port << 2));
@@ -2353,7 +2353,7 @@ static void rtl930x_set_egr_filter(int port,  enum egr_filter state)
 		    RTL930X_VLAN_PORT_EGR_FLTR + (((port / 29) << 2)));
 }
 
-void rtl930x_set_distribution_algorithm(int group, int algoidx, u32 algomsk)
+static void rtl930x_set_distribution_algorithm(int group, int algoidx, u32 algomsk)
 {
 	u32 l3shift = 0;
 	u32 newmask = 0;

target/linux/realtek/files-6.6/drivers/net/dsa/rtl83xx/rtl931x.c

@@ -136,7 +136,7 @@ inline int rtl931x_tbl_access_data_0(int i)
 	return RTL931X_TBL_ACCESS_DATA_0(i);
 }
 
-void rtl931x_vlan_profile_dump(int index)
+static void rtl931x_vlan_profile_dump(int index)
 {
 	u64 profile[4];
 
@@ -528,7 +528,7 @@ void rtl931x_set_receive_management_action(int port, rma_ctrl_t type, action_typ
 	}
 }
 
-u64 rtl931x_traffic_get(int source)
+static u64 rtl931x_traffic_get(int source)
 {
 	u32 v;
 	struct table_reg *r = rtl_table_get(RTL9310_TBL_0, 6);
@@ -542,7 +542,7 @@ u64 rtl931x_traffic_get(int source)
 }
 
 /* Enable traffic between a source port and a destination port matrix */
-void rtl931x_traffic_set(int source, u64 dest_matrix)
+static void rtl931x_traffic_set(int source, u64 dest_matrix)
 {
 	struct table_reg *r = rtl_table_get(RTL9310_TBL_0, 6);
 
@@ -551,7 +551,7 @@ void rtl931x_traffic_set(int source, u64 dest_matrix)
 	rtl_table_release(r);
 }
 
-void rtl931x_traffic_enable(int source, int dest)
+static void rtl931x_traffic_enable(int source, int dest)
 {
 	struct table_reg *r = rtl_table_get(RTL9310_TBL_0, 6);
 	rtl_table_read(r, source);
@@ -560,7 +560,7 @@ void rtl931x_traffic_enable(int source, int dest)
 	rtl_table_release(r);
 }
 
-void rtl931x_traffic_disable(int source, int dest)
+static void rtl931x_traffic_disable(int source, int dest)
 {
 	struct table_reg *r = rtl_table_get(RTL9310_TBL_0, 6);
 	rtl_table_read(r, source);
@@ -941,7 +941,7 @@ static void rtl931x_pie_lookup_enable(struct rtl838x_switch_priv *priv, int inde
  * pie_data_fill function for all SoCs, provided we have also for each SoC a
  * function to map between physical and intermediate field type
  */
-int rtl931x_pie_data_fill(enum template_field_id field_type, struct pie_rule *pr, u16 *data, u16 *data_m)
+static int rtl931x_pie_data_fill(enum template_field_id field_type, struct pie_rule *pr, u16 *data, u16 *data_m)
 {
 	*data = *data_m = 0;
 
@@ -1233,7 +1233,7 @@ static void rtl931x_write_pie_action(u32 r[],  struct pie_rule *pr)
 	r[17] |= pr->bypass_ibc_sc ? BIT(16) : 0;
 }
 
-void rtl931x_pie_rule_dump_raw(u32 r[])
+static void rtl931x_pie_rule_dump_raw(u32 r[])
 {
 	pr_debug("Raw IACL table entry:\n");
 	pr_debug("r 0 - 7: %08x %08x %08x %08x %08x %08x %08x %08x\n",
@@ -1477,12 +1477,12 @@ static void rtl931x_pie_init(struct rtl838x_switch_priv *priv)
 
 }
 
-int rtl931x_l3_setup(struct rtl838x_switch_priv *priv)
+static int rtl931x_l3_setup(struct rtl838x_switch_priv *priv)
 {
 	return 0;
 }
 
-void rtl931x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
+static void rtl931x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
 {
 	sw_w32(FIELD_PREP(RTL931X_VLAN_PORT_TAG_EGR_OTAG_STS_MASK,
 			  keep_outer ? RTL931X_VLAN_PORT_TAG_STS_TAGGED : RTL931X_VLAN_PORT_TAG_STS_UNTAG) |
@@ -1491,7 +1491,7 @@ void rtl931x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
 	       RTL931X_VLAN_PORT_TAG_CTRL(port));
 }
 
-void rtl931x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode)
+static void rtl931x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode)
 {
 	if (type == PBVLAN_TYPE_INNER)
 		sw_w32_mask(0x3 << 12, mode << 12, RTL931X_VLAN_PORT_IGR_CTRL + (port << 2));
@@ -1499,7 +1499,7 @@ void rtl931x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan
 		sw_w32_mask(0x3 << 26, mode << 26, RTL931X_VLAN_PORT_IGR_CTRL + (port << 2));
 }
 
-void rtl931x_vlan_port_pvid_set(int port, enum pbvlan_type type, int pvid)
+static void rtl931x_vlan_port_pvid_set(int port, enum pbvlan_type type, int pvid)
 {
 	if (type == PBVLAN_TYPE_INNER)
 		sw_w32_mask(0xfff, pvid, RTL931X_VLAN_PORT_IGR_CTRL + (port << 2));
@@ -1519,7 +1519,7 @@ static void rtl931x_set_egr_filter(int port,  enum egr_filter state)
 		    RTL931X_VLAN_PORT_EGR_FLTR + (((port >> 5) << 2)));
 }
 
-void rtl931x_set_distribution_algorithm(int group, int algoidx, u32 algomsk)
+static void rtl931x_set_distribution_algorithm(int group, int algoidx, u32 algomsk)
 {
 	u32 l3shift = 0;
 	u32 newmask = 0;