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@@ -4,6 +4,7 @@
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* Copyright (C) 2009-2010 Gabor Juhos <[email protected]>
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* Copyright (C) 2010 Antti Seppälä <[email protected]>
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* Copyright (C) 2010 Roman Yeryomin <[email protected]>
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+ * Copyright (C) 2011 Colin Leitner <[email protected]>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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@@ -23,7 +24,7 @@
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#include "rtl8366_smi.h"
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#define RTL8366RB_DRIVER_DESC "Realtek RTL8366RB ethernet switch driver"
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-#define RTL8366RB_DRIVER_VER "0.2.3"
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+#define RTL8366RB_DRIVER_VER "0.2.4"
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#define RTL8366RB_PHY_NO_MAX 4
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#define RTL8366RB_PHY_PAGE_MAX 7
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@@ -44,6 +45,17 @@
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/* Port Enable Control register */
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#define RTL8366RB_PECR 0x0001
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+/* Port Mirror Control Register */
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+#define RTL8366RB_PMCR 0x0007
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+#define RTL8366RB_PMCR_SOURCE_PORT(_x) (_x)
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+#define RTL8366RB_PMCR_SOURCE_PORT_MASK 0x000f
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+#define RTL8366RB_PMCR_MONITOR_PORT(_x) ((_x) << 4)
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+#define RTL8366RB_PMCR_MONITOR_PORT_MASK 0x00f0
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+#define RTL8366RB_PMCR_MIRROR_RX BIT(8)
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+#define RTL8366RB_PMCR_MIRROR_TX BIT(9)
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+#define RTL8366RB_PMCR_MIRROR_SPC BIT(10)
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+#define RTL8366RB_PMCR_MIRROR_ISO BIT(11)
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+
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/* Switch Security Control registers */
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#define RTL8366RB_SSCR0 0x0002
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#define RTL8366RB_SSCR1 0x0003
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@@ -922,6 +934,180 @@ static int rtl8366rb_sw_get_qos_enable(struct switch_dev *dev,
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return 0;
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}
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+static int rtl8366rb_sw_set_mirror_rx_enable(struct switch_dev *dev,
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+ const struct switch_attr *attr,
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+ struct switch_val *val)
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+{
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+ struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
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+ u32 data;
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+
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+ if (val->value.i)
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+ data = RTL8366RB_PMCR_MIRROR_RX;
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+ else
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+ data = 0;
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+
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+ return rtl8366_smi_rmwr(smi, RTL8366RB_PMCR, RTL8366RB_PMCR_MIRROR_RX, data);
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+}
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+
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+static int rtl8366rb_sw_get_mirror_rx_enable(struct switch_dev *dev,
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+ const struct switch_attr *attr,
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+ struct switch_val *val)
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+{
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+ struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
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+ u32 data;
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+
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+ rtl8366_smi_read_reg(smi, RTL8366RB_PMCR, &data);
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+ if (data & RTL8366RB_PMCR_MIRROR_RX)
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+ val->value.i = 1;
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+ else
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+ val->value.i = 0;
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+
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+ return 0;
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+}
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+
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+static int rtl8366rb_sw_set_mirror_tx_enable(struct switch_dev *dev,
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+ const struct switch_attr *attr,
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+ struct switch_val *val)
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+{
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+ struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
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+ u32 data;
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+
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+ if (val->value.i)
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+ data = RTL8366RB_PMCR_MIRROR_TX;
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+ else
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+ data = 0;
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+
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+ return rtl8366_smi_rmwr(smi, RTL8366RB_PMCR, RTL8366RB_PMCR_MIRROR_TX, data);
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+}
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+
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+static int rtl8366rb_sw_get_mirror_tx_enable(struct switch_dev *dev,
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+ const struct switch_attr *attr,
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+ struct switch_val *val)
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+{
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+ struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
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+ u32 data;
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+
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+ rtl8366_smi_read_reg(smi, RTL8366RB_PMCR, &data);
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+ if (data & RTL8366RB_PMCR_MIRROR_TX)
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+ val->value.i = 1;
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+ else
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+ val->value.i = 0;
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+
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+ return 0;
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+}
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+
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+static int rtl8366rb_sw_set_monitor_isolation_enable(struct switch_dev *dev,
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+ const struct switch_attr *attr,
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+ struct switch_val *val)
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+{
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+ struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
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+ u32 data;
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+
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+ if (val->value.i)
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+ data = RTL8366RB_PMCR_MIRROR_ISO;
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+ else
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+ data = 0;
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+
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+ return rtl8366_smi_rmwr(smi, RTL8366RB_PMCR, RTL8366RB_PMCR_MIRROR_ISO, data);
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+}
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+
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+static int rtl8366rb_sw_get_monitor_isolation_enable(struct switch_dev *dev,
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+ const struct switch_attr *attr,
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+ struct switch_val *val)
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+{
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+ struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
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+ u32 data;
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+
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+ rtl8366_smi_read_reg(smi, RTL8366RB_PMCR, &data);
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+ if (data & RTL8366RB_PMCR_MIRROR_ISO)
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+ val->value.i = 1;
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+ else
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+ val->value.i = 0;
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+
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+ return 0;
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+}
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+
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+static int rtl8366rb_sw_set_mirror_pause_frames_enable(struct switch_dev *dev,
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+ const struct switch_attr *attr,
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+ struct switch_val *val)
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+{
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+ struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
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+ u32 data;
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+
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+ if (val->value.i)
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+ data = RTL8366RB_PMCR_MIRROR_SPC;
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+ else
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+ data = 0;
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+
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+ return rtl8366_smi_rmwr(smi, RTL8366RB_PMCR, RTL8366RB_PMCR_MIRROR_SPC, data);
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+}
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+
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+static int rtl8366rb_sw_get_mirror_pause_frames_enable(struct switch_dev *dev,
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+ const struct switch_attr *attr,
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+ struct switch_val *val)
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+{
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+ struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
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+ u32 data;
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+
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+ rtl8366_smi_read_reg(smi, RTL8366RB_PMCR, &data);
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+ if (data & RTL8366RB_PMCR_MIRROR_SPC)
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+ val->value.i = 1;
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+ else
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+ val->value.i = 0;
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+
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+ return 0;
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+}
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+
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+static int rtl8366rb_sw_set_mirror_monitor_port(struct switch_dev *dev,
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+ const struct switch_attr *attr,
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+ struct switch_val *val)
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+{
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+ struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
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+ u32 data;
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+
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+ data = RTL8366RB_PMCR_MONITOR_PORT(val->value.i);
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+
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+ return rtl8366_smi_rmwr(smi, RTL8366RB_PMCR, RTL8366RB_PMCR_MONITOR_PORT_MASK, data);
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+}
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+
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+static int rtl8366rb_sw_get_mirror_monitor_port(struct switch_dev *dev,
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+ const struct switch_attr *attr,
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+ struct switch_val *val)
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+{
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+ struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
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+ u32 data;
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+
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+ rtl8366_smi_read_reg(smi, RTL8366RB_PMCR, &data);
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+ val->value.i = (data & RTL8366RB_PMCR_MONITOR_PORT_MASK) >> 4;
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+
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+ return 0;
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+}
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+
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+static int rtl8366rb_sw_set_mirror_source_port(struct switch_dev *dev,
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+ const struct switch_attr *attr,
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+ struct switch_val *val)
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+{
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+ struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
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+ u32 data;
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+
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+ data = RTL8366RB_PMCR_SOURCE_PORT(val->value.i);
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+
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+ return rtl8366_smi_rmwr(smi, RTL8366RB_PMCR, RTL8366RB_PMCR_SOURCE_PORT_MASK, data);
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+}
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+
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+static int rtl8366rb_sw_get_mirror_source_port(struct switch_dev *dev,
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+ const struct switch_attr *attr,
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+ struct switch_val *val)
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+{
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+ struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
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+ u32 data;
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+
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+ rtl8366_smi_read_reg(smi, RTL8366RB_PMCR, &data);
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+ val->value.i = data & RTL8366RB_PMCR_SOURCE_PORT_MASK;
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+
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+ return 0;
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+}
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+
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static int rtl8366rb_sw_reset_port_mibs(struct switch_dev *dev,
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const struct switch_attr *attr,
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struct switch_val *val)
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@@ -979,6 +1165,48 @@ static struct switch_attr rtl8366rb_globals[] = {
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.set = rtl8366rb_sw_set_qos_enable,
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.get = rtl8366rb_sw_get_qos_enable,
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.max = 1
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+ }, {
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+ .type = SWITCH_TYPE_INT,
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+ .name = "enable_mirror_rx",
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+ .description = "Enable mirroring of RX packets",
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+ .set = rtl8366rb_sw_set_mirror_rx_enable,
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+ .get = rtl8366rb_sw_get_mirror_rx_enable,
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+ .max = 1
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+ }, {
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+ .type = SWITCH_TYPE_INT,
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+ .name = "enable_mirror_tx",
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+ .description = "Enable mirroring of TX packets",
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+ .set = rtl8366rb_sw_set_mirror_tx_enable,
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+ .get = rtl8366rb_sw_get_mirror_tx_enable,
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+ .max = 1
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+ }, {
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+ .type = SWITCH_TYPE_INT,
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+ .name = "enable_monitor_isolation",
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+ .description = "Enable isolation of monitor port (TX packets will be dropped)",
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+ .set = rtl8366rb_sw_set_monitor_isolation_enable,
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+ .get = rtl8366rb_sw_get_monitor_isolation_enable,
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+ .max = 1
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+ }, {
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+ .type = SWITCH_TYPE_INT,
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+ .name = "enable_mirror_pause_frames",
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+ .description = "Enable mirroring of RX pause frames",
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+ .set = rtl8366rb_sw_set_mirror_pause_frames_enable,
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+ .get = rtl8366rb_sw_get_mirror_pause_frames_enable,
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+ .max = 1
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+ }, {
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+ .type = SWITCH_TYPE_INT,
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+ .name = "mirror_monitor_port",
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+ .description = "Mirror monitor port",
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+ .set = rtl8366rb_sw_set_mirror_monitor_port,
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+ .get = rtl8366rb_sw_get_mirror_monitor_port,
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+ .max = 5
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+ }, {
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+ .type = SWITCH_TYPE_INT,
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+ .name = "mirror_source_port",
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+ .description = "Mirror source port",
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+ .set = rtl8366rb_sw_set_mirror_source_port,
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+ .get = rtl8366rb_sw_get_mirror_source_port,
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+ .max = 5
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},
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};
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@@ -1263,5 +1491,6 @@ MODULE_VERSION(RTL8366RB_DRIVER_VER);
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MODULE_AUTHOR("Gabor Juhos <[email protected]>");
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MODULE_AUTHOR("Antti Seppälä <[email protected]>");
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MODULE_AUTHOR("Roman Yeryomin <[email protected]>");
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+MODULE_AUTHOR("Colin Leitner <[email protected]>");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("platform:" RTL8366RB_DRIVER_NAME);
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