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@@ -23,8 +23,11 @@ extern struct rtl83xx_soc_info soc_info;
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extern int rtmdio_930x_read_sds_phy(int sds, int page, int regnum);
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extern int rtmdio_930x_write_sds_phy(int sds, int page, int regnum, u16 val);
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-extern int rtmdio_931x_read_sds_phy_new(int sds, int page, int regnum);
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-extern int rtmdio_931x_write_sds_phy_new(int sds, int page, int regnum, u16 val);
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+extern int rtsds_931x_read(int sds, int page, int regnum);
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+extern int rtsds_931x_read_field(int sds, int page, int regnum, int end_bit, int start_bit);
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+
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+extern int rtsds_931x_write(int sds, int page, int regnum, u16 val);
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+extern int rtsds_931x_write_field(int sds, int page, int regnum, int end_bit, int start_bit, u16 val);
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#define PHY_PAGE_2 2
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#define PHY_PAGE_4 4
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@@ -2634,33 +2637,6 @@ int rtl9300_sds_cmu_band_get(int sds)
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return cmu_band;
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}
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-static void rtl9310_sds_field_w_new(int sds, u32 page, u32 reg, int end_bit, int start_bit, u32 v)
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-{
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- int l = end_bit - start_bit + 1;
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- u32 data = v;
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-
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- if (l < 32) {
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- u32 mask = BIT(l) - 1;
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-
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- data = rtmdio_931x_read_sds_phy_new(sds, page, reg);
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- data &= ~(mask << start_bit);
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- data |= (v & mask) << start_bit;
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- }
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-
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- rtmdio_931x_write_sds_phy_new(sds, page, reg, data);
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-}
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-
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-static u32 rtl9310_sds_field_r_new(int sds, u32 page, u32 reg, int end_bit, int start_bit)
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-{
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- int l = end_bit - start_bit + 1;
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- u32 v = rtmdio_931x_read_sds_phy_new(sds, page, reg);
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-
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- if (l >= 32)
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- return v;
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-
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- return (v >> start_bit) & (BIT(l) - 1);
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-}
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-
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static void rtl931x_sds_rst(u32 sds)
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{
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u32 o, v, o_mode;
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@@ -2688,21 +2664,21 @@ static void rtl931x_symerr_clear(u32 sds, phy_interface_t mode)
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break;
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case PHY_INTERFACE_MODE_XGMII:
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for (int i = 0; i < 4; ++i) {
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- rtl9310_sds_field_w_new(sds, 0x101, 24, 2, 0, i);
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- rtl9310_sds_field_w_new(sds, 0x101, 3, 15, 8, 0x0);
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- rtl9310_sds_field_w_new(sds, 0x101, 2, 15, 0, 0x0);
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+ rtsds_931x_write_field(sds, 0x101, 24, 2, 0, i);
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+ rtsds_931x_write_field(sds, 0x101, 3, 15, 8, 0x0);
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+ rtsds_931x_write_field(sds, 0x101, 2, 15, 0, 0x0);
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}
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for (int i = 0; i < 4; ++i) {
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- rtl9310_sds_field_w_new(sds, 0x201, 24, 2, 0, i);
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- rtl9310_sds_field_w_new(sds, 0x201, 3, 15, 8, 0x0);
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- rtl9310_sds_field_w_new(sds, 0x201, 2, 15, 0, 0x0);
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+ rtsds_931x_write_field(sds, 0x201, 24, 2, 0, i);
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+ rtsds_931x_write_field(sds, 0x201, 3, 15, 8, 0x0);
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+ rtsds_931x_write_field(sds, 0x201, 2, 15, 0, 0x0);
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}
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- rtl9310_sds_field_w_new(sds, 0x101, 0, 15, 0, 0x0);
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- rtl9310_sds_field_w_new(sds, 0x101, 1, 15, 8, 0x0);
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- rtl9310_sds_field_w_new(sds, 0x201, 0, 15, 0, 0x0);
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- rtl9310_sds_field_w_new(sds, 0x201, 1, 15, 8, 0x0);
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+ rtsds_931x_write_field(sds, 0x101, 0, 15, 0, 0x0);
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+ rtsds_931x_write_field(sds, 0x101, 1, 15, 8, 0x0);
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+ rtsds_931x_write_field(sds, 0x201, 0, 15, 0, 0x0);
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+ rtsds_931x_write_field(sds, 0x201, 1, 15, 8, 0x0);
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break;
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default:
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break;
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@@ -2715,7 +2691,7 @@ void rtl931x_sds_fiber_disable(u32 sds)
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{
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u32 v = 0x3F;
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- rtl9310_sds_field_w_new(sds, 0x1F, 0x9, 11, 6, v);
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+ rtsds_931x_write_field(sds, 0x1F, 0x9, 11, 6, v);
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}
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static void rtl931x_sds_fiber_mode_set(u32 sds, phy_interface_t mode)
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@@ -2755,7 +2731,7 @@ static void rtl931x_sds_fiber_mode_set(u32 sds, phy_interface_t mode)
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}
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pr_info("%s writing analog SerDes Mode value %02x\n", __func__, val);
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- rtl9310_sds_field_w_new(sds, 0x1F, 0x9, 11, 6, val);
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+ rtsds_931x_write_field(sds, 0x1F, 0x9, 11, 6, val);
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return;
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}
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@@ -2803,7 +2779,7 @@ static void rtl931x_cmu_type_set(u32 sds, phy_interface_t mode, int chiptype)
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/* case MII_10GR1000BX_AUTO:
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if (chiptype)
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- rtl9310_sds_field_w_new(sds, 0x24, 0xd, 14, 14, 0);
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+ rtsds_931x_write_field(sds, 0x24, 0xd, 14, 14, 0);
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return; */
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case PHY_INTERFACE_MODE_QSGMII:
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@@ -2855,21 +2831,21 @@ static void rtl931x_cmu_type_set(u32 sds, phy_interface_t mode, int chiptype)
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__func__, cmu_type, cmu_page, frc_cmu_spd, lane, sds);
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if (cmu_type == 1) {
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- pr_info("%s A CMU page 0x28 0x7 %08x\n", __func__, rtmdio_931x_read_sds_phy_new(sds, 0x28, 0x7));
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- rtl9310_sds_field_w_new(sds, cmu_page, 0x7, 15, 15, 0);
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- pr_info("%s B CMU page 0x28 0x7 %08x\n", __func__, rtmdio_931x_read_sds_phy_new(sds, 0x28, 0x7));
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+ pr_info("%s A CMU page 0x28 0x7 %08x\n", __func__, rtsds_931x_read(sds, 0x28, 0x7));
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+ rtsds_931x_write_field(sds, cmu_page, 0x7, 15, 15, 0);
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+ pr_info("%s B CMU page 0x28 0x7 %08x\n", __func__, rtsds_931x_read(sds, 0x28, 0x7));
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if (chiptype) {
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- rtl9310_sds_field_w_new(sds, cmu_page, 0xd, 14, 14, 0);
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+ rtsds_931x_write_field(sds, cmu_page, 0xd, 14, 14, 0);
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}
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- rtl9310_sds_field_w_new(evenSds, 0x20, 0x12, 3, 2, 0x3);
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- rtl9310_sds_field_w_new(evenSds, 0x20, 0x12, frc_lc_mode_bitnum, frc_lc_mode_bitnum, 1);
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- rtl9310_sds_field_w_new(evenSds, 0x20, 0x12, frc_lc_mode_val_bitnum, frc_lc_mode_val_bitnum, 0);
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- rtl9310_sds_field_w_new(evenSds, 0x20, 0x12, 12, 12, 1);
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- rtl9310_sds_field_w_new(evenSds, 0x20, 0x12, 15, 13, frc_cmu_spd);
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+ rtsds_931x_write_field(evenSds, 0x20, 0x12, 3, 2, 0x3);
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+ rtsds_931x_write_field(evenSds, 0x20, 0x12, frc_lc_mode_bitnum, frc_lc_mode_bitnum, 1);
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+ rtsds_931x_write_field(evenSds, 0x20, 0x12, frc_lc_mode_val_bitnum, frc_lc_mode_val_bitnum, 0);
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+ rtsds_931x_write_field(evenSds, 0x20, 0x12, 12, 12, 1);
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+ rtsds_931x_write_field(evenSds, 0x20, 0x12, 15, 13, frc_cmu_spd);
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}
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- pr_info("%s CMU page 0x28 0x7 %08x\n", __func__, rtmdio_931x_read_sds_phy_new(sds, 0x28, 0x7));
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+ pr_info("%s CMU page 0x28 0x7 %08x\n", __func__, rtsds_931x_read(sds, 0x28, 0x7));
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return;
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}
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@@ -2878,15 +2854,15 @@ static void rtl931x_sds_rx_rst(u32 sds)
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if (sds < 2)
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return;
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- rtmdio_931x_write_sds_phy_new(sds, 0x2e, 0x12, 0x2740);
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- rtmdio_931x_write_sds_phy_new(sds, 0x2f, 0x0, 0x0);
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- rtmdio_931x_write_sds_phy_new(sds, 0x2f, 0x2, 0x2010);
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- rtmdio_931x_write_sds_phy_new(sds, 0x20, 0x0, 0xc10);
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+ rtsds_931x_write(sds, 0x2e, 0x12, 0x2740);
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+ rtsds_931x_write(sds, 0x2f, 0x0, 0x0);
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+ rtsds_931x_write(sds, 0x2f, 0x2, 0x2010);
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+ rtsds_931x_write(sds, 0x20, 0x0, 0xc10);
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- rtmdio_931x_write_sds_phy_new(sds, 0x2e, 0x12, 0x27c0);
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- rtmdio_931x_write_sds_phy_new(sds, 0x2f, 0x0, 0xc000);
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- rtmdio_931x_write_sds_phy_new(sds, 0x2f, 0x2, 0x6010);
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- rtmdio_931x_write_sds_phy_new(sds, 0x20, 0x0, 0xc30);
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+ rtsds_931x_write(sds, 0x2e, 0x12, 0x27c0);
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+ rtsds_931x_write(sds, 0x2f, 0x0, 0xc000);
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+ rtsds_931x_write(sds, 0x2f, 0x2, 0x6010);
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+ rtsds_931x_write(sds, 0x20, 0x0, 0xc30);
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mdelay(50);
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}
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@@ -2972,20 +2948,20 @@ void rtl931x_sds_init(u32 sds, phy_interface_t mode)
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return;
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pr_info("%s: set sds %d to mode %d\n", __func__, sds, mode);
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- val = rtl9310_sds_field_r_new(sds, 0x1F, 0x9, 11, 6);
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+ val = rtsds_931x_read_field(sds, 0x1F, 0x9, 11, 6);
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pr_info("%s: fibermode %08X stored mode 0x%x", __func__,
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- rtmdio_931x_read_sds_phy_new(sds, 0x1f, 0x9), val);
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+ rtsds_931x_read(sds, 0x1f, 0x9), val);
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pr_info("%s: SGMII mode %08X in 0x24 0x9", __func__,
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- rtmdio_931x_read_sds_phy_new(sds, 0x24, 0x9));
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+ rtsds_931x_read(sds, 0x24, 0x9));
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pr_info("%s: CMU mode %08X stored even SDS %d", __func__,
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- rtmdio_931x_read_sds_phy_new(sds & ~1, 0x20, 0x12), sds & ~1);
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+ rtsds_931x_read(sds & ~1, 0x20, 0x12), sds & ~1);
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pr_info("%s: serdes_mode_ctrl %08X", __func__, RTL931X_SERDES_MODE_CTRL + 4 * (sds >> 2));
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- pr_info("%s CMU page 0x24 0x7 %08x\n", __func__, rtmdio_931x_read_sds_phy_new(sds, 0x24, 0x7));
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- pr_info("%s CMU page 0x26 0x7 %08x\n", __func__, rtmdio_931x_read_sds_phy_new(sds, 0x26, 0x7));
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- pr_info("%s CMU page 0x28 0x7 %08x\n", __func__, rtmdio_931x_read_sds_phy_new(sds, 0x28, 0x7));
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- pr_info("%s XSG page 0x0 0xe %08x\n", __func__, rtmdio_931x_read_sds_phy_new(sds, 0x100, 0xe));
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- pr_info("%s XSG2 page 0x0 0xe %08x\n", __func__, rtmdio_931x_read_sds_phy_new(sds, 0x200, 0xe));
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+ pr_info("%s CMU page 0x24 0x7 %08x\n", __func__, rtsds_931x_read(sds, 0x24, 0x7));
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+ pr_info("%s CMU page 0x26 0x7 %08x\n", __func__, rtsds_931x_read(sds, 0x26, 0x7));
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+ pr_info("%s CMU page 0x28 0x7 %08x\n", __func__, rtsds_931x_read(sds, 0x28, 0x7));
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+ pr_info("%s XSG page 0x0 0xe %08x\n", __func__, rtsds_931x_read(sds, 0x100, 0xe));
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+ pr_info("%s XSG2 page 0x0 0xe %08x\n", __func__, rtsds_931x_read(sds, 0x200, 0xe));
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model_info = sw_r32(RTL93XX_MODEL_NAME_INFO);
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if ((model_info >> 4) & 0x1) {
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@@ -2996,7 +2972,7 @@ void rtl931x_sds_init(u32 sds, phy_interface_t mode)
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}
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pr_info("%s: 2.5gbit %08X", __func__,
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- rtmdio_931x_read_sds_phy_new(sds, 0x101, 0x14));
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+ rtsds_931x_read(sds, 0x101, 0x14));
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pr_info("%s: RTL931X_PS_SERDES_OFF_MODE_CTRL_ADDR 0x%08X\n", __func__, sw_r32(RTL931X_PS_SERDES_OFF_MODE_CTRL_ADDR));
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ori = sw_r32(RTL931X_PS_SERDES_OFF_MODE_CTRL_ADDR);
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@@ -3011,16 +2987,16 @@ void rtl931x_sds_init(u32 sds, phy_interface_t mode)
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if (chiptype) {
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/* fifo inv clk */
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- rtl9310_sds_field_w_new(sds, 0x101, 0x1, 7, 4, 0xf);
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- rtl9310_sds_field_w_new(sds, 0x101, 0x1, 3, 0, 0xf);
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+ rtsds_931x_write_field(sds, 0x101, 0x1, 7, 4, 0xf);
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+ rtsds_931x_write_field(sds, 0x101, 0x1, 3, 0, 0xf);
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- rtl9310_sds_field_w_new(sds, 0x201, 0x1, 7, 4, 0xf);
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- rtl9310_sds_field_w_new(sds, 0x201, 0x1, 3, 0, 0xf);
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+ rtsds_931x_write_field(sds, 0x201, 0x1, 7, 4, 0xf);
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+ rtsds_931x_write_field(sds, 0x201, 0x1, 3, 0, 0xf);
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}
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- rtl9310_sds_field_w_new(sds, 0x100, 0xE, 12, 12, 1);
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- rtl9310_sds_field_w_new(sds, 0x200, 0xE, 12, 12, 1);
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+ rtsds_931x_write_field(sds, 0x100, 0xE, 12, 12, 1);
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+ rtsds_931x_write_field(sds, 0x200, 0xE, 12, 12, 1);
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break;
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case PHY_INTERFACE_MODE_USXGMII: /* MII_USXGMII_10GSXGMII/10GDXGMII/10GQXGMII: */
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@@ -3028,73 +3004,73 @@ void rtl931x_sds_init(u32 sds, phy_interface_t mode)
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u32 evenSds;
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if (chiptype) {
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- rtl9310_sds_field_w_new(sds, 0x6, 0x2, 12, 12, 1);
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+ rtsds_931x_write_field(sds, 0x6, 0x2, 12, 12, 1);
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for (int i = 0; i < sizeof(sds_config_10p3125g_type1) / sizeof(sds_config); ++i) {
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- rtmdio_931x_write_sds_phy_new(sds, sds_config_10p3125g_type1[i].page - 0x4, sds_config_10p3125g_type1[i].reg, sds_config_10p3125g_type1[i].data);
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+ rtsds_931x_write(sds, sds_config_10p3125g_type1[i].page - 0x4, sds_config_10p3125g_type1[i].reg, sds_config_10p3125g_type1[i].data);
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}
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evenSds = sds & ~1;
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for (int i = 0; i < sizeof(sds_config_10p3125g_cmu_type1) / sizeof(sds_config); ++i) {
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- rtmdio_931x_write_sds_phy_new(evenSds,
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+ rtsds_931x_write(evenSds,
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sds_config_10p3125g_cmu_type1[i].page - 0x4, sds_config_10p3125g_cmu_type1[i].reg, sds_config_10p3125g_cmu_type1[i].data);
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}
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- rtl9310_sds_field_w_new(sds, 0x6, 0x2, 12, 12, 0);
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+ rtsds_931x_write_field(sds, 0x6, 0x2, 12, 12, 0);
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} else {
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- rtl9310_sds_field_w_new(sds, 0x2e, 0xd, 6, 0, 0x0);
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- rtl9310_sds_field_w_new(sds, 0x2e, 0xd, 7, 7, 0x1);
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+ rtsds_931x_write_field(sds, 0x2e, 0xd, 6, 0, 0x0);
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+ rtsds_931x_write_field(sds, 0x2e, 0xd, 7, 7, 0x1);
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|
|
|
|
- rtl9310_sds_field_w_new(sds, 0x2e, 0x1c, 5, 0, 0x1E);
|
|
|
- rtl9310_sds_field_w_new(sds, 0x2e, 0x1d, 11, 0, 0x00);
|
|
|
- rtl9310_sds_field_w_new(sds, 0x2e, 0x1f, 11, 0, 0x00);
|
|
|
- rtl9310_sds_field_w_new(sds, 0x2f, 0x0, 11, 0, 0x00);
|
|
|
- rtl9310_sds_field_w_new(sds, 0x2f, 0x1, 11, 0, 0x00);
|
|
|
+ rtsds_931x_write_field(sds, 0x2e, 0x1c, 5, 0, 0x1E);
|
|
|
+ rtsds_931x_write_field(sds, 0x2e, 0x1d, 11, 0, 0x00);
|
|
|
+ rtsds_931x_write_field(sds, 0x2e, 0x1f, 11, 0, 0x00);
|
|
|
+ rtsds_931x_write_field(sds, 0x2f, 0x0, 11, 0, 0x00);
|
|
|
+ rtsds_931x_write_field(sds, 0x2f, 0x1, 11, 0, 0x00);
|
|
|
|
|
|
- rtl9310_sds_field_w_new(sds, 0x2e, 0xf, 12, 6, 0x7F);
|
|
|
- rtmdio_931x_write_sds_phy_new(sds, 0x2f, 0x12, 0xaaa);
|
|
|
+ rtsds_931x_write_field(sds, 0x2e, 0xf, 12, 6, 0x7F);
|
|
|
+ rtsds_931x_write(sds, 0x2f, 0x12, 0xaaa);
|
|
|
|
|
|
rtl931x_sds_rx_rst(sds);
|
|
|
|
|
|
- rtmdio_931x_write_sds_phy_new(sds, 0x7, 0x10, op_code);
|
|
|
- rtmdio_931x_write_sds_phy_new(sds, 0x6, 0x1d, 0x0480);
|
|
|
- rtmdio_931x_write_sds_phy_new(sds, 0x6, 0xe, 0x0400);
|
|
|
+ rtsds_931x_write(sds, 0x7, 0x10, op_code);
|
|
|
+ rtsds_931x_write(sds, 0x6, 0x1d, 0x0480);
|
|
|
+ rtsds_931x_write(sds, 0x6, 0xe, 0x0400);
|
|
|
}
|
|
|
break;
|
|
|
|
|
|
case PHY_INTERFACE_MODE_10GBASER: /* MII_10GR / MII_10GR1000BX_AUTO: */
|
|
|
/* configure 10GR fiber mode=1 */
|
|
|
- rtl9310_sds_field_w_new(sds, 0x1f, 0xb, 1, 1, 1);
|
|
|
+ rtsds_931x_write_field(sds, 0x1f, 0xb, 1, 1, 1);
|
|
|
|
|
|
/* init fiber_1g */
|
|
|
- rtl9310_sds_field_w_new(sds, 0x103, 0x13, 15, 14, 0);
|
|
|
+ rtsds_931x_write_field(sds, 0x103, 0x13, 15, 14, 0);
|
|
|
|
|
|
- rtl9310_sds_field_w_new(sds, 0x102, 0x0, 12, 12, 1);
|
|
|
- rtl9310_sds_field_w_new(sds, 0x102, 0x0, 6, 6, 1);
|
|
|
- rtl9310_sds_field_w_new(sds, 0x102, 0x0, 13, 13, 0);
|
|
|
+ rtsds_931x_write_field(sds, 0x102, 0x0, 12, 12, 1);
|
|
|
+ rtsds_931x_write_field(sds, 0x102, 0x0, 6, 6, 1);
|
|
|
+ rtsds_931x_write_field(sds, 0x102, 0x0, 13, 13, 0);
|
|
|
|
|
|
/* init auto */
|
|
|
- rtl9310_sds_field_w_new(sds, 0x1f, 13, 15, 0, 0x109e);
|
|
|
- rtl9310_sds_field_w_new(sds, 0x1f, 0x6, 14, 10, 0x8);
|
|
|
- rtl9310_sds_field_w_new(sds, 0x1f, 0x7, 10, 4, 0x7f);
|
|
|
+ rtsds_931x_write_field(sds, 0x1f, 13, 15, 0, 0x109e);
|
|
|
+ rtsds_931x_write_field(sds, 0x1f, 0x6, 14, 10, 0x8);
|
|
|
+ rtsds_931x_write_field(sds, 0x1f, 0x7, 10, 4, 0x7f);
|
|
|
break;
|
|
|
|
|
|
case PHY_INTERFACE_MODE_1000BASEX: /* MII_1000BX_FIBER */
|
|
|
- rtl9310_sds_field_w_new(sds, 0x103, 0x13, 15, 14, 0);
|
|
|
+ rtsds_931x_write_field(sds, 0x103, 0x13, 15, 14, 0);
|
|
|
|
|
|
- rtl9310_sds_field_w_new(sds, 0x102, 0x0, 12, 12, 1);
|
|
|
- rtl9310_sds_field_w_new(sds, 0x102, 0x0, 6, 6, 1);
|
|
|
- rtl9310_sds_field_w_new(sds, 0x102, 0x0, 13, 13, 0);
|
|
|
+ rtsds_931x_write_field(sds, 0x102, 0x0, 12, 12, 1);
|
|
|
+ rtsds_931x_write_field(sds, 0x102, 0x0, 6, 6, 1);
|
|
|
+ rtsds_931x_write_field(sds, 0x102, 0x0, 13, 13, 0);
|
|
|
break;
|
|
|
|
|
|
case PHY_INTERFACE_MODE_SGMII:
|
|
|
- rtl9310_sds_field_w_new(sds, 0x24, 0x9, 15, 15, 0);
|
|
|
+ rtsds_931x_write_field(sds, 0x24, 0x9, 15, 15, 0);
|
|
|
break;
|
|
|
|
|
|
case PHY_INTERFACE_MODE_2500BASEX:
|
|
|
- rtl9310_sds_field_w_new(sds, 0x101, 0x14, 8, 8, 1);
|
|
|
+ rtsds_931x_write_field(sds, 0x101, 0x14, 8, 8, 1);
|
|
|
break;
|
|
|
|
|
|
case PHY_INTERFACE_MODE_QSGMII:
|
|
|
@@ -3108,16 +3084,16 @@ void rtl931x_sds_init(u32 sds, phy_interface_t mode)
|
|
|
|
|
|
if (sds >= 2 && sds <= 13) {
|
|
|
if (chiptype)
|
|
|
- rtmdio_931x_write_sds_phy_new(sds, 0x2E, 0x1, board_sds_tx_type1[sds - 2]);
|
|
|
+ rtsds_931x_write(sds, 0x2E, 0x1, board_sds_tx_type1[sds - 2]);
|
|
|
else {
|
|
|
val = 0xa0000;
|
|
|
sw_w32(val, RTL93XX_CHIP_INFO);
|
|
|
val = sw_r32(RTL93XX_CHIP_INFO);
|
|
|
if (val & BIT(28)) /* consider 9311 etc. RTL9313_CHIP_ID == HWP_CHIP_ID(unit)) */
|
|
|
{
|
|
|
- rtmdio_931x_write_sds_phy_new(sds, 0x2E, 0x1, board_sds_tx2[sds - 2]);
|
|
|
+ rtsds_931x_write(sds, 0x2E, 0x1, board_sds_tx2[sds - 2]);
|
|
|
} else {
|
|
|
- rtmdio_931x_write_sds_phy_new(sds, 0x2E, 0x1, board_sds_tx[sds - 2]);
|
|
|
+ rtsds_931x_write(sds, 0x2E, 0x1, board_sds_tx[sds - 2]);
|
|
|
}
|
|
|
val = 0;
|
|
|
sw_w32(val, RTL93XX_CHIP_INFO);
|
|
|
@@ -3148,14 +3124,14 @@ int rtl931x_sds_cmu_band_set(int sds, bool enable, u32 band, phy_interface_t mod
|
|
|
page += 1;
|
|
|
|
|
|
if (enable) {
|
|
|
- rtl9310_sds_field_w_new(sds, page, 0x7, 13, 13, 0);
|
|
|
- rtl9310_sds_field_w_new(sds, page, 0x7, 11, 11, 0);
|
|
|
+ rtsds_931x_write_field(sds, page, 0x7, 13, 13, 0);
|
|
|
+ rtsds_931x_write_field(sds, page, 0x7, 11, 11, 0);
|
|
|
} else {
|
|
|
- rtl9310_sds_field_w_new(sds, page, 0x7, 13, 13, 0);
|
|
|
- rtl9310_sds_field_w_new(sds, page, 0x7, 11, 11, 0);
|
|
|
+ rtsds_931x_write_field(sds, page, 0x7, 13, 13, 0);
|
|
|
+ rtsds_931x_write_field(sds, page, 0x7, 11, 11, 0);
|
|
|
}
|
|
|
|
|
|
- rtl9310_sds_field_w_new(sds, page, 0x7, 4, 0, band);
|
|
|
+ rtsds_931x_write_field(sds, page, 0x7, 4, 0, band);
|
|
|
|
|
|
rtl931x_sds_rst(sds);
|
|
|
|
|
|
@@ -3169,10 +3145,10 @@ int rtl931x_sds_cmu_band_get(int sds, phy_interface_t mode)
|
|
|
|
|
|
sds -= (sds % 2);
|
|
|
page += 1;
|
|
|
- rtmdio_931x_write_sds_phy_new(sds, 0x1f, 0x02, 73);
|
|
|
+ rtsds_931x_write(sds, 0x1f, 0x02, 73);
|
|
|
|
|
|
- rtl9310_sds_field_w_new(sds, page, 0x5, 15, 15, 1);
|
|
|
- band = rtl9310_sds_field_r_new(sds, 0x1f, 0x15, 8, 3);
|
|
|
+ rtsds_931x_write_field(sds, page, 0x5, 15, 15, 1);
|
|
|
+ band = rtsds_931x_read_field(sds, 0x1f, 0x15, 8, 3);
|
|
|
pr_info("%s band is: %d\n", __func__, band);
|
|
|
|
|
|
return band;
|
|
|
@@ -3183,15 +3159,15 @@ int rtl931x_link_sts_get(u32 sds)
|
|
|
{
|
|
|
u32 sts, sts1, latch_sts, latch_sts1;
|
|
|
if (0){
|
|
|
- sts = rtl9310_sds_field_r_new(sds, 0x101, 29, 8, 0);
|
|
|
- sts1 = rtl9310_sds_field_r_new(sds, 0x201, 29, 8, 0);
|
|
|
- latch_sts = rtl9310_sds_field_r_new(sds, 0x101, 30, 8, 0);
|
|
|
- latch_sts1 = rtl9310_sds_field_r_new(sds, 0x201, 30, 8, 0);
|
|
|
+ sts = rtsds_931x_read_field(sds, 0x101, 29, 8, 0);
|
|
|
+ sts1 = rtsds_931x_read_field(sds, 0x201, 29, 8, 0);
|
|
|
+ latch_sts = rtsds_931x_read_field(sds, 0x101, 30, 8, 0);
|
|
|
+ latch_sts1 = rtsds_931x_read_field(sds, 0x201, 30, 8, 0);
|
|
|
} else {
|
|
|
- sts = rtl9310_sds_field_r_new(sds, 0x5, 0, 12, 12);
|
|
|
- latch_sts = rtl9310_sds_field_r_new(sds, 0x4, 1, 2, 2);
|
|
|
- latch_sts1 = rtl9310_sds_field_r_new(sds, 0x102, 1, 2, 2);
|
|
|
- sts1 = rtl9310_sds_field_r_new(sds, 0x102, 1, 2, 2);
|
|
|
+ sts = rtsds_931x_read_field(sds, 0x5, 0, 12, 12);
|
|
|
+ latch_sts = rtsds_931x_read_field(sds, 0x4, 1, 2, 2);
|
|
|
+ latch_sts1 = rtsds_931x_read_field(sds, 0x102, 1, 2, 2);
|
|
|
+ sts1 = rtsds_931x_read_field(sds, 0x102, 1, 2, 2);
|
|
|
}
|
|
|
|
|
|
pr_info("%s: serdes %d sts %d, sts1 %d, latch_sts %d, latch_sts1 %d\n", __func__,
|