The RT3352 SoC only supports 46 GPIO lines. Signed-off-by: Gabor Juhos <[email protected]> SVN-Revision: 38602
@@ -132,7 +132,7 @@
#gpio-cells = <2>;
ralink,gpio-base = <40>;
- ralink,num-gpios = <12>;
+ ralink,num-gpios = <6>;
ralink,register-map = [ 00 04 08 0c
10 14 18 1c
20 24 ];