uboot-rockchip: update to v2021.07

Tested on NanoPi R2S

Signed-off-by: David Bauer <[email protected]>

package/boot/uboot-rockchip/Makefile

@@ -5,10 +5,10 @@
 include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/kernel.mk
 
-PKG_VERSION:=2021.04
+PKG_VERSION:=2021.07
 PKG_RELEASE:=1
 
-PKG_HASH:=0d438b1bb5cceb57a18ea2de4a0d51f7be5b05b98717df05938636e0aadfe11a
+PKG_HASH:=312b7eeae44581d1362c3a3f02c28d806647756c82ba8c72241c7cdbe68ba77e
 
 PKG_MAINTAINER:=Tobias Maedel <[email protected]>
 
@@ -88,6 +88,7 @@ ifneq ($(OF_PLATDATA),)
 
 	$(CP) $(PKG_BUILD_DIR)/of-platdata/$(OF_PLATDATA)/dt-plat.c $(PKG_BUILD_DIR)/tpl/dts/dt-plat.c
 	$(CP) $(PKG_BUILD_DIR)/of-platdata/$(OF_PLATDATA)/dt-structs-gen.h $(PKG_BUILD_DIR)/include/generated/dt-structs-gen.h
+	$(CP) $(PKG_BUILD_DIR)/of-platdata/$(OF_PLATDATA)/dt-decl.h $(PKG_BUILD_DIR)/include/generated/dt-decl.h
 endif
 
 	$(SED) 's#CONFIG_MKIMAGE_DTC_PATH=.*#CONFIG_MKIMAGE_DTC_PATH="$(PKG_BUILD_DIR)/scripts/dtc/dtc"#g' $(PKG_BUILD_DIR)/.config

package/boot/uboot-rockchip/patches/002-spl-remove-dtoc-of-pdata-generation.patch

@@ -17,14 +17,12 @@ Signed-off-by: David Bauer <[email protected]>
 
 --- a/scripts/Makefile.spl
 +++ b/scripts/Makefile.spl
-@@ -329,10 +329,6 @@ PHONY += dts_dir
- dts_dir:
- 	$(shell [ -d $(obj)/dts ] || mkdir -p $(obj)/dts)
- 
--include/generated/dt-structs-gen.h $(u-boot-spl-platdata_c) &: \
--		$(obj)/$(SPL_BIN).dtb dts_dir FORCE
+@@ -354,8 +354,6 @@ $(platdata-hdr) $(u-boot-spl-platdata_c)
+ 	@# of OF_PLATDATA_INST and this might change between builds. Leaving old
+ 	@# ones around is confusing and it is possible that switching the
+ 	@# setting again will use the old one instead of regenerating it.
+-	@rm -f $(u-boot-spl-all-platdata_c) $(u-boot-spl-all-platdata)
 -	$(call if_changed,dtoc)
--
+ 
  ifdef CONFIG_SAMSUNG
  ifdef CONFIG_VAR_SIZE_SPL
- VAR_SIZE_PARAM = --vs

package/boot/uboot-rockchip/patches/102-arm64-rk3399-Add-support-NanoPi-R4s.patch

@@ -1,290 +0,0 @@
-From b69b9f3f54732c303939eb748aad97cd4cf60168 Mon Sep 17 00:00:00 2001
-From: Xiaobo Tian <[email protected]>
-Date: Sat, 27 Feb 2021 22:39:11 +0800
-Subject: [PATCH] arm64: rk3399: Add support NanoPi R4s
-
-NanoPi R4s is SBC base on Rockchip RK3399 hexa-core processor with
-dual-Core Cortex-A72 and Mali-T864 GPU with 4GiB(LPDDR4) of RAM, SD card support,
-including 2 gigabit ethernet(RTL8211E 1Gbps - RTL8111H 1Gbps) and 2 USB 3.0 port.
-port.It also has two GPIO headers which allows further peripherals to be used.
-
-The devicetree file is taken of the rk3399 nanopi4 Linux kernel [1].
-
-[1] https://github.com/torvalds/linux/commit/e7a095908227fb3ccc86d001d9e13c9ae2bef8e6
-
-Signed-off-by: xiaobo <[email protected]>
-Reviewed-by: Kever Yang <[email protected]>
----
- arch/arm/dts/Makefile                      |   1 +
- arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi |  16 +++
- arch/arm/dts/rk3399-nanopi-r4s.dts         | 138 +++++++++++++++++++++
- board/rockchip/evb_rk3399/MAINTAINERS      |   6 +
- configs/nanopi-r4s-rk3399_defconfig        |  62 +++++++++
- 5 files changed, 223 insertions(+)
- create mode 100644 arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi
- create mode 100644 arch/arm/dts/rk3399-nanopi-r4s.dts
- create mode 100644 configs/nanopi-r4s-rk3399_defconfig
-
-diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
-index dd4d4efed31..0a139473811 100644
---- a/arch/arm/dts/Makefile
-+++ b/arch/arm/dts/Makefile
-@@ -132,6 +132,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
- 	rk3399-nanopi-m4.dtb \
- 	rk3399-nanopi-m4-2gb.dtb \
- 	rk3399-nanopi-neo4.dtb \
-+	rk3399-nanopi-r4s.dtb \
- 	rk3399-orangepi.dtb \
- 	rk3399-pinebook-pro.dtb \
- 	rk3399-puma-haikou.dtb \
-diff --git a/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi b/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi
-new file mode 100644
-index 00000000000..cd1642527ba
---- /dev/null
-+++ b/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi
-@@ -0,0 +1,16 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+/*
-+ * RK3399-based FriendlyElec boards device tree source
-+ *
-+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
-+ *
-+ * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
-+ * (http://www.friendlyarm.com)
-+ *
-+ * Copyright (c) 2018 Collabora Ltd.
-+ * Copyright (c) 2019 Arm Ltd.
-+ * Copyright (C) 2020 Xiaobo <[email protected]>
-+ */
-+
-+#include "rk3399-nanopi4-u-boot.dtsi"
-+#include "rk3399-sdram-lpddr4-100.dtsi"
-diff --git a/arch/arm/dts/rk3399-nanopi-r4s.dts b/arch/arm/dts/rk3399-nanopi-r4s.dts
-new file mode 100644
-index 00000000000..6f2cf17bf1b
---- /dev/null
-+++ b/arch/arm/dts/rk3399-nanopi-r4s.dts
-@@ -0,0 +1,138 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+/*
-+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
-+ *
-+ * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
-+ * (http://www.friendlyarm.com)
-+ *
-+ * Copyright (c) 2018 Collabora Ltd.
-+ * Copyright (c) 2019 Arm Ltd.
-+ * Copyright (C) 2020 Xiaobo <[email protected]>
-+ */
-+
-+/dts-v1/;
-+#include "rk3399-nanopi4.dtsi"
-+
-+/ {
-+	model = "FriendlyElec NanoPi R4S";
-+	compatible = "friendlyarm,nanopi-r4s", "rockchip,rk3399";
-+
-+	aliases {
-+		ethernet1 = &r8169;
-+	};
-+
-+	vdd_5v: vdd-5v {
-+		compatible = "regulator-fixed";
-+		regulator-name = "vdd_5v";
-+		regulator-always-on;
-+		regulator-boot-on;
-+	};
-+
-+	fan: pwm-fan {
-+		compatible = "pwm-fan";
-+		cooling-levels = <0 12 18 255>;
-+		#cooling-cells = <2>;
-+		fan-supply = <&vdd_5v>;
-+		pwms = <&pwm1 0 50000 0>;
-+	};
-+};
-+
-+&cpu_thermal {
-+	trips {
-+		cpu_warm: cpu_warm {
-+			temperature = <55000>;
-+			hysteresis = <2000>;
-+			type = "active";
-+		};
-+
-+		cpu_hot: cpu_hot {
-+			temperature = <65000>;
-+			hysteresis = <2000>;
-+			type = "active";
-+		};
-+	};
-+
-+	cooling-maps {
-+		map2 {
-+			trip = <&cpu_warm>;
-+			cooling-device = <&fan THERMAL_NO_LIMIT 1>;
-+		};
-+
-+		map3 {
-+			trip = <&cpu_hot>;
-+			cooling-device = <&fan 2 THERMAL_NO_LIMIT>;
-+		};
-+	};
-+};
-+
-+&emmc_phy {
-+	status = "disabled";
-+};
-+
-+&fusb0 {
-+	status = "disabled";
-+};
-+
-+&leds {
-+	lan_led: led-1 {
-+		gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
-+		label = "nanopi-r4s:green:lan";
-+	};
-+
-+	wan_led: led-2 {
-+		gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
-+		label = "nanopi-r4s:green:wan";
-+	};
-+};
-+
-+&leds_gpio {
-+	rockchip,pins =
-+		<0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,
-+		<1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>,
-+		<1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
-+};
-+
-+&pcie0 {
-+	max-link-speed = <1>;
-+	num-lanes = <1>;
-+	vpcie3v3-supply = <&vcc3v3_sys>;
-+
-+	pcie@0 {
-+		reg = <0x00000000 0 0 0 0>;
-+		#address-cells = <3>;
-+		#size-cells = <2>;
-+
-+		r8169: pcie@0,0 {
-+			reg = <0x000000 0 0 0 0>;
-+			local-mac-address = [ 00 00 00 00 00 00 ];
-+		};
-+	};
-+};
-+
-+&sdhci {
-+	status = "disabled";
-+};
-+
-+&sdio0 {
-+	status = "disabled";
-+};
-+
-+&sdmmc {
-+	host-index-min = <1>;
-+};
-+
-+&u2phy0_host {
-+	phy-supply = <&vdd_5v>;
-+};
-+
-+&u2phy1_host {
-+	status = "disabled";
-+};
-+
-+&usbdrd_dwc3_0 {
-+	dr_mode = "host";
-+};
-+
-+&vcc3v3_sys {
-+	vin-supply = <&vcc5v0_sys>;
-+};
-diff --git a/board/rockchip/evb_rk3399/MAINTAINERS b/board/rockchip/evb_rk3399/MAINTAINERS
-index 4c889e06a63..3b9d60eccd4 100644
---- a/board/rockchip/evb_rk3399/MAINTAINERS
-+++ b/board/rockchip/evb_rk3399/MAINTAINERS
-@@ -55,6 +55,12 @@ S:	Maintained
- F:	configs/nanopi-neo4-rk3399_defconfig
- F:	arch/arm/dts/rk3399-nanopi-neo4-u-boot.dtsi
- 
-+NANOPI-R4S
-+M:	Xiaobo Tian <[email protected]>
-+S:	Maintained
-+F:	configs/nanopi-r4s-rk3399_defconfig
-+F:	arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi
-+
- ORANGEPI-RK3399
- M:	Jagan Teki <[email protected]>
- S:	Maintained
-diff --git a/configs/nanopi-r4s-rk3399_defconfig b/configs/nanopi-r4s-rk3399_defconfig
-new file mode 100644
-index 00000000000..0a3c28b0126
---- /dev/null
-+++ b/configs/nanopi-r4s-rk3399_defconfig
-@@ -0,0 +1,62 @@
-+CONFIG_ARM=y
-+CONFIG_ARCH_ROCKCHIP=y
-+CONFIG_SYS_TEXT_BASE=0x00200000
-+CONFIG_ENV_OFFSET=0x3F8000
-+CONFIG_ROCKCHIP_RK3399=y
-+CONFIG_TARGET_EVB_RK3399=y
-+CONFIG_NR_DRAM_BANKS=1
-+CONFIG_DEBUG_UART_BASE=0xFF1A0000
-+CONFIG_DEBUG_UART_CLOCK=24000000
-+CONFIG_DEBUG_UART=y
-+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-r4s.dtb"
-+CONFIG_DISPLAY_BOARDINFO_LATE=y
-+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
-+CONFIG_SPL_STACK_R=y
-+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
-+CONFIG_TPL=y
-+CONFIG_CMD_BOOTZ=y
-+CONFIG_CMD_GPT=y
-+CONFIG_CMD_MMC=y
-+CONFIG_CMD_USB=y
-+# CONFIG_CMD_SETEXPR is not set
-+CONFIG_CMD_TIME=y
-+CONFIG_SPL_OF_CONTROL=y
-+CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-r4s"
-+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-+CONFIG_ENV_IS_IN_MMC=y
-+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-+CONFIG_ROCKCHIP_GPIO=y
-+CONFIG_SYS_I2C_ROCKCHIP=y
-+CONFIG_MMC_DW=y
-+CONFIG_MMC_DW_ROCKCHIP=y
-+CONFIG_MMC_SDHCI=y
-+CONFIG_MMC_SDHCI_ROCKCHIP=y
-+CONFIG_DM_ETH=y
-+CONFIG_ETH_DESIGNWARE=y
-+CONFIG_GMAC_ROCKCHIP=y
-+CONFIG_PMIC_RK8XX=y
-+CONFIG_REGULATOR_PWM=y
-+CONFIG_REGULATOR_RK8XX=y
-+CONFIG_PWM_ROCKCHIP=y
-+CONFIG_RAM_RK3399_LPDDR4=y
-+CONFIG_BAUDRATE=1500000
-+CONFIG_DEBUG_UART_SHIFT=2
-+CONFIG_SYSRESET=y
-+CONFIG_USB=y
-+CONFIG_USB_XHCI_HCD=y
-+CONFIG_USB_XHCI_DWC3=y
-+CONFIG_USB_EHCI_HCD=y
-+CONFIG_USB_EHCI_GENERIC=y
-+CONFIG_USB_KEYBOARD=y
-+CONFIG_USB_HOST_ETHER=y
-+CONFIG_USB_ETHER_ASIX=y
-+CONFIG_USB_ETHER_ASIX88179=y
-+CONFIG_USB_ETHER_MCS7830=y
-+CONFIG_USB_ETHER_RTL8152=y
-+CONFIG_USB_ETHER_SMSC95XX=y
-+CONFIG_DM_VIDEO=y
-+CONFIG_DISPLAY=y
-+CONFIG_VIDEO_ROCKCHIP=y
-+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
-+CONFIG_SPL_TINY_MEMSET=y
-+CONFIG_ERRNO_STR=y

package/boot/uboot-rockchip/src/of-platdata/nanopi-r2s-rk3328/dt-decl.h

@@ -0,0 +1,23 @@
+/*
+ * DO NOT MODIFY
+ *
+ * Declares externs for all device/uclass instances.
+ * This was generated by dtoc from a .dtb (device tree binary) file.
+ */
+
+#include <dm/device-internal.h>
+#include <dm/uclass-internal.h>
+
+/* driver declarations - these allow DM_DRIVER_GET() to be used */
+extern U_BOOT_DRIVER(rockchip_rk3328_cru);
+extern U_BOOT_DRIVER(rockchip_rk3328_dmc);
+extern U_BOOT_DRIVER(rockchip_rk3288_dw_mshc);
+extern U_BOOT_DRIVER(ns16550_serial);
+extern U_BOOT_DRIVER(rockchip_rk3328_grf);
+
+/* uclass driver declarations - needed for DM_UCLASS_DRIVER_REF() */
+extern UCLASS_DRIVER(clk);
+extern UCLASS_DRIVER(mmc);
+extern UCLASS_DRIVER(ram);
+extern UCLASS_DRIVER(serial);
+extern UCLASS_DRIVER(syscon);

package/boot/uboot-rockchip/src/of-platdata/nanopi-r2s-rk3328/dt-plat.c

@@ -12,19 +12,38 @@
 #include <dm.h>
 #include <dt-structs.h>
 
-/* Node /clock-controller@ff440000 index 0 */
+/*
+ * driver_info declarations, ordered by 'struct driver_info' linker_list idx:
+ *
+ * idx  driver_info          driver
+ * ---  -------------------- --------------------
+ *   0: clock_controller_at_ff440000 rockchip_rk3328_cru
+ *   1: dmc                  rockchip_rk3328_dmc
+ *   2: mmc_at_ff500000      rockchip_rk3288_dw_mshc
+ *   3: serial_at_ff130000   ns16550_serial
+ *   4: syscon_at_ff100000   rockchip_rk3328_grf
+ * ---  -------------------- --------------------
+ */
+
+/*
+ * Node /clock-controller@ff440000 index 0
+ * driver rockchip_rk3328_cru parent None
+ */
 static struct dtd_rockchip_rk3328_cru dtv_clock_controller_at_ff440000 = {
 	.reg			= {0xff440000, 0x1000},
 	.rockchip_grf		= 0x3a,
 };
 U_BOOT_DRVINFO(clock_controller_at_ff440000) = {
 	.name		= "rockchip_rk3328_cru",
-	.plat	= &dtv_clock_controller_at_ff440000,
+	.plat		= &dtv_clock_controller_at_ff440000,
 	.plat_size	= sizeof(dtv_clock_controller_at_ff440000),
 	.parent_idx	= -1,
 };
 
-/* Node /dmc index 1 */
+/*
+ * Node /dmc index 1
+ * driver rockchip_rk3328_dmc parent None
+ */
 static struct dtd_rockchip_rk3328_dmc dtv_dmc = {
 	.reg			= {0xff400000, 0x1000, 0xff780000, 0x3000, 0xff100000, 0x1000, 0xff440000, 0x1000,
 		0xff720000, 0x1000, 0xff798000, 0x1000},
@@ -56,12 +75,15 @@ static struct dtd_rockchip_rk3328_dmc dtv_dmc = {
 };
 U_BOOT_DRVINFO(dmc) = {
 	.name		= "rockchip_rk3328_dmc",
-	.plat	= &dtv_dmc,
+	.plat		= &dtv_dmc,
 	.plat_size	= sizeof(dtv_dmc),
 	.parent_idx	= -1,
 };
 
-/* Node /mmc@ff500000 index 2 */
+/*
+ * Node /mmc@ff500000 index 2
+ * driver rockchip_rk3288_dw_mshc parent None
+ */
 static struct dtd_rockchip_rk3288_dw_mshc dtv_mmc_at_ff500000 = {
 	.bus_width		= 0x4,
 	.cap_sd_highspeed	= true,
@@ -87,12 +109,15 @@ static struct dtd_rockchip_rk3288_dw_mshc dtv_mmc_at_ff500000 = {
 };
 U_BOOT_DRVINFO(mmc_at_ff500000) = {
 	.name		= "rockchip_rk3288_dw_mshc",
-	.plat	= &dtv_mmc_at_ff500000,
+	.plat		= &dtv_mmc_at_ff500000,
 	.plat_size	= sizeof(dtv_mmc_at_ff500000),
 	.parent_idx	= -1,
 };
 
-/* Node /serial@ff130000 index 3 */
+/*
+ * Node /serial@ff130000 index 3
+ * driver ns16550_serial parent None
+ */
 static struct dtd_ns16550_serial dtv_serial_at_ff130000 = {
 	.clock_frequency	= 0x16e3600,
 	.clocks			= {
@@ -109,18 +134,21 @@ static struct dtd_ns16550_serial dtv_serial_at_ff130000 = {
 };
 U_BOOT_DRVINFO(serial_at_ff130000) = {
 	.name		= "ns16550_serial",
-	.plat	= &dtv_serial_at_ff130000,
+	.plat		= &dtv_serial_at_ff130000,
 	.plat_size	= sizeof(dtv_serial_at_ff130000),
 	.parent_idx	= -1,
 };
 
-/* Node /syscon@ff100000 index 4 */
+/*
+ * Node /syscon@ff100000 index 4
+ * driver rockchip_rk3328_grf parent None
+ */
 static struct dtd_rockchip_rk3328_grf dtv_syscon_at_ff100000 = {
 	.reg			= {0xff100000, 0x1000},
 };
 U_BOOT_DRVINFO(syscon_at_ff100000) = {
 	.name		= "rockchip_rk3328_grf",
-	.plat	= &dtv_syscon_at_ff100000,
+	.plat		= &dtv_syscon_at_ff100000,
 	.plat_size	= sizeof(dtv_syscon_at_ff100000),
 	.parent_idx	= -1,
 };