|
|
@@ -1,19 +1,44 @@
|
|
|
-From a10fc0cb650be725157eca50e2ceb34efc281ac2 Mon Sep 17 00:00:00 2001
|
|
|
+From b00b5eafa7e8d059bd0ce844e66f648916953270 Mon Sep 17 00:00:00 2001
|
|
|
From: John Crispin <[email protected]>
|
|
|
-Date: Mon, 22 Apr 2013 23:20:03 +0200
|
|
|
-Subject: [PATCH 29/53] phy: usb: add ralink phy
|
|
|
+Date: Sun, 3 Jan 2016 19:11:22 +0100
|
|
|
+Subject: [PATCH 2/3] phy: ralink-usb: add driver for Mediatek/Ralink
|
|
|
+
|
|
|
+Add a driver to setup the USB phy on Mediatek/Ralink SoCs.
|
|
|
+The driver is trivial and only sets up power and host mode.
|
|
|
|
|
|
Signed-off-by: John Crispin <[email protected]>
|
|
|
---
|
|
|
- drivers/phy/Kconfig | 5 ++
|
|
|
- drivers/phy/Makefile | 1 +
|
|
|
- drivers/phy/phy-ralink-usb.c | 175 ++++++++++++++++++++++++++++++++++++++++++
|
|
|
- 3 files changed, 181 insertions(+)
|
|
|
+ .../devicetree/bindings/phy/ralink-usb-phy.txt | 17 ++
|
|
|
+ drivers/phy/Kconfig | 8 +
|
|
|
+ drivers/phy/Makefile | 1 +
|
|
|
+ drivers/phy/phy-ralink-usb.c | 171 ++++++++++++++++++++
|
|
|
+ 4 files changed, 197 insertions(+)
|
|
|
+ create mode 100644 Documentation/devicetree/bindings/phy/ralink-usb-phy.txt
|
|
|
create mode 100644 drivers/phy/phy-ralink-usb.c
|
|
|
|
|
|
+--- /dev/null
|
|
|
++++ b/Documentation/devicetree/bindings/phy/ralink-usb-phy.txt
|
|
|
+@@ -0,0 +1,17 @@
|
|
|
++Mediatek/Ralink USB PHY
|
|
|
++
|
|
|
++Required properties:
|
|
|
++ - compatible: ralink,rt3352-usbphy or mediatek,mt7620-usbphy
|
|
|
++ - #phy-cells: should be 0
|
|
|
++ - resets: the two reset controllers for host and device
|
|
|
++ - reset-names: the names of the 2 reset controllers
|
|
|
++
|
|
|
++Example:
|
|
|
++
|
|
|
++usbphy: phy {
|
|
|
++ compatible = "mediatek,mt7620-usbphy";
|
|
|
++ #phy-cells = <0>;
|
|
|
++
|
|
|
++ resets = <&rstctrl 22 &rstctrl 25>;
|
|
|
++ reset-names = "host", "device";
|
|
|
++};
|
|
|
--- a/drivers/phy/Kconfig
|
|
|
+++ b/drivers/phy/Kconfig
|
|
|
-@@ -331,6 +331,11 @@ config PHY_XGENE
|
|
|
+@@ -331,6 +331,14 @@
|
|
|
help
|
|
|
This option enables support for APM X-Gene SoC multi-purpose PHY.
|
|
|
|
|
|
@@ -21,13 +46,16 @@ Signed-off-by: John Crispin <[email protected]>
|
|
|
+ tristate "Ralink USB PHY driver"
|
|
|
+ select GENERIC_PHY
|
|
|
+ depends on RALINK
|
|
|
++ help
|
|
|
++ This option enables support for the Ralink USB PHY found inside
|
|
|
++ RT3352 and MT7620.
|
|
|
+
|
|
|
config PHY_STIH407_USB
|
|
|
tristate "STMicroelectronics USB2 picoPHY driver for STiH407 family"
|
|
|
depends on RESET_CONTROLLER
|
|
|
--- a/drivers/phy/Makefile
|
|
|
+++ b/drivers/phy/Makefile
|
|
|
-@@ -46,3 +46,4 @@ obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-
|
|
|
+@@ -46,3 +46,4 @@
|
|
|
obj-$(CONFIG_PHY_TUSB1210) += phy-tusb1210.o
|
|
|
obj-$(CONFIG_PHY_BRCMSTB_SATA) += phy-brcmstb-sata.o
|
|
|
obj-$(CONFIG_PHY_PISTACHIO_USB) += phy-pistachio-usb.o
|
|
|
@@ -38,7 +66,7 @@ Signed-off-by: John Crispin <[email protected]>
|
|
|
+/*
|
|
|
+ * Allwinner ralink USB phy driver
|
|
|
+ *
|
|
|
-+ * Copyright (C) 2014 John Crispin <[email protected]>
|
|
|
++ * Copyright (C) 2016 John Crispin <[email protected]>
|
|
|
+ *
|
|
|
+ * Based on code from
|
|
|
+ * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
|
|
|
@@ -83,94 +111,76 @@ Signed-off-by: John Crispin <[email protected]>
|
|
|
+#define USB_PHY_UTMI_8B60M BIT(1)
|
|
|
+#define UDEV_WAKEUP BIT(0)
|
|
|
+
|
|
|
-+static atomic_t usb_pwr_ref = ATOMIC_INIT(0);
|
|
|
-+static struct reset_control *rstdev;
|
|
|
-+static struct reset_control *rsthost;
|
|
|
-+static u32 phy_clk;
|
|
|
-+static struct phy *rt_phy;
|
|
|
++struct ralink_usb_phy {
|
|
|
++ struct reset_control *rstdev;
|
|
|
++ struct reset_control *rsthost;
|
|
|
++ u32 clk;
|
|
|
++ struct phy *phy;
|
|
|
++};
|
|
|
+
|
|
|
-+static void usb_phy_enable(int state)
|
|
|
++static int ralink_usb_phy_power_on(struct phy *_phy)
|
|
|
+{
|
|
|
-+ if (state)
|
|
|
-+ rt_sysc_m32(0, phy_clk, RT_SYSC_REG_CLKCFG1);
|
|
|
++ struct ralink_usb_phy *phy = phy_get_drvdata(_phy);
|
|
|
++ u32 t;
|
|
|
++
|
|
|
++ /* enable the phy */
|
|
|
++ rt_sysc_m32(0, phy->clk, RT_SYSC_REG_CLKCFG1);
|
|
|
++
|
|
|
++ /* setup host mode */
|
|
|
++ rt_sysc_m32(0, RT_SYSCFG1_USB0_HOST_MODE, RT_SYSC_REG_SYSCFG1);
|
|
|
++
|
|
|
++ /* deassert the reset lines */
|
|
|
++ reset_control_deassert(phy->rsthost);
|
|
|
++ reset_control_deassert(phy->rstdev);
|
|
|
++
|
|
|
++ /*
|
|
|
++ * The SDK kernel had a delay of 100ms. however on device
|
|
|
++ * testing showed that 10ms is enough
|
|
|
++ */
|
|
|
++ mdelay(10);
|
|
|
++
|
|
|
++ /* print some status info */
|
|
|
++ t = rt_sysc_r32(RT_SYSC_REG_USB_PHY_CFG);
|
|
|
++ dev_info(&phy->phy->dev, "remote usb device wakeup %s\n",
|
|
|
++ (t & UDEV_WAKEUP) ? ("enabled") : ("disabled"));
|
|
|
++ if (t & USB_PHY_UTMI_8B60M)
|
|
|
++ dev_info(&phy->phy->dev, "UTMI 8bit 60MHz\n");
|
|
|
+ else
|
|
|
-+ rt_sysc_m32(phy_clk, 0, RT_SYSC_REG_CLKCFG1);
|
|
|
-+ mdelay(100);
|
|
|
-+}
|
|
|
-+
|
|
|
-+static int ralink_usb_phy_init(struct phy *_phy)
|
|
|
-+{
|
|
|
-+ return 0;
|
|
|
-+}
|
|
|
++ dev_info(&phy->phy->dev, "UTMI 16bit 30MHz\n");
|
|
|
+
|
|
|
-+static int ralink_usb_phy_exit(struct phy *_phy)
|
|
|
-+{
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
-+static int ralink_usb_phy_power_on(struct phy *_phy)
|
|
|
++static int ralink_usb_phy_power_off(struct phy *_phy)
|
|
|
+{
|
|
|
-+ if (atomic_inc_return(&usb_pwr_ref) == 1) {
|
|
|
-+ int host = 1;
|
|
|
-+ u32 t;
|
|
|
-+
|
|
|
-+ usb_phy_enable(1);
|
|
|
-+
|
|
|
-+ if (host) {
|
|
|
-+ rt_sysc_m32(0, RT_SYSCFG1_USB0_HOST_MODE, RT_SYSC_REG_SYSCFG1);
|
|
|
-+ if (!IS_ERR(rsthost))
|
|
|
-+ reset_control_deassert(rsthost);
|
|
|
-+ if (!IS_ERR(rstdev))
|
|
|
-+ reset_control_deassert(rstdev);
|
|
|
-+ } else {
|
|
|
-+ rt_sysc_m32(RT_SYSCFG1_USB0_HOST_MODE, 0, RT_SYSC_REG_SYSCFG1);
|
|
|
-+ if (!IS_ERR(rstdev))
|
|
|
-+ reset_control_deassert(rstdev);
|
|
|
-+ }
|
|
|
-+ mdelay(100);
|
|
|
-+
|
|
|
-+ t = rt_sysc_r32(RT_SYSC_REG_USB_PHY_CFG);
|
|
|
-+ dev_info(&_phy->dev, "remote usb device wakeup %s\n",
|
|
|
-+ (t & UDEV_WAKEUP) ? ("enabbled") : ("disabled"));
|
|
|
-+ if (t & USB_PHY_UTMI_8B60M)
|
|
|
-+ dev_info(&_phy->dev, "UTMI 8bit 60MHz\n");
|
|
|
-+ else
|
|
|
-+ dev_info(&_phy->dev, "UTMI 16bit 30MHz\n");
|
|
|
-+ }
|
|
|
++ struct ralink_usb_phy *phy = phy_get_drvdata(_phy);
|
|
|
+
|
|
|
-+ return 0;
|
|
|
-+}
|
|
|
++ /* disable the phy */
|
|
|
++ rt_sysc_m32(phy->clk, 0, RT_SYSC_REG_CLKCFG1);
|
|
|
+
|
|
|
-+static int ralink_usb_phy_power_off(struct phy *_phy)
|
|
|
-+{
|
|
|
-+ if (atomic_dec_return(&usb_pwr_ref) == 0) {
|
|
|
-+ usb_phy_enable(0);
|
|
|
-+ if (!IS_ERR(rstdev))
|
|
|
-+ reset_control_assert(rstdev);
|
|
|
-+ if (!IS_ERR(rsthost))
|
|
|
-+ reset_control_assert(rsthost);
|
|
|
-+ }
|
|
|
++ /* assert the reset lines */
|
|
|
++ reset_control_assert(phy->rstdev);
|
|
|
++ reset_control_assert(phy->rsthost);
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static struct phy_ops ralink_usb_phy_ops = {
|
|
|
-+ .init = ralink_usb_phy_init,
|
|
|
-+ .exit = ralink_usb_phy_exit,
|
|
|
+ .power_on = ralink_usb_phy_power_on,
|
|
|
+ .power_off = ralink_usb_phy_power_off,
|
|
|
+ .owner = THIS_MODULE,
|
|
|
+};
|
|
|
+
|
|
|
-+static struct phy *ralink_usb_phy_xlate(struct device *dev,
|
|
|
-+ struct of_phandle_args *args)
|
|
|
-+{
|
|
|
-+ return rt_phy;
|
|
|
-+}
|
|
|
-+
|
|
|
+static const struct of_device_id ralink_usb_phy_of_match[] = {
|
|
|
-+ { .compatible = "ralink,rt3xxx-usbphy", .data = (void *) (RT_CLKCFG1_UPHY1_CLK_EN | RT_CLKCFG1_UPHY0_CLK_EN) },
|
|
|
-+ { .compatible = "ralink,mt7620a-usbphy", .data = (void *) (MT7620_CLKCFG1_UPHY1_CLK_EN | MT7620_CLKCFG1_UPHY0_CLK_EN) },
|
|
|
++ {
|
|
|
++ .compatible = "ralink,rt3352-usbphy",
|
|
|
++ .data = (void *) (RT_CLKCFG1_UPHY1_CLK_EN |
|
|
|
++ RT_CLKCFG1_UPHY0_CLK_EN)
|
|
|
++ },
|
|
|
++ {
|
|
|
++ .compatible = "mediatek,mt7620-usbphy",
|
|
|
++ .data = (void *) (MT7620_CLKCFG1_UPHY1_CLK_EN |
|
|
|
++ MT7620_CLKCFG1_UPHY0_CLK_EN) },
|
|
|
+ { },
|
|
|
+};
|
|
|
+MODULE_DEVICE_TABLE(of, ralink_usb_phy_of_match);
|
|
|
@@ -180,20 +190,38 @@ Signed-off-by: John Crispin <[email protected]>
|
|
|
+ struct device *dev = &pdev->dev;
|
|
|
+ struct phy_provider *phy_provider;
|
|
|
+ const struct of_device_id *match;
|
|
|
++ struct ralink_usb_phy *phy;
|
|
|
++
|
|
|
++ phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
|
|
|
++ if (!phy)
|
|
|
++ return -ENOMEM;
|
|
|
+
|
|
|
+ match = of_match_device(ralink_usb_phy_of_match, &pdev->dev);
|
|
|
-+ phy_clk = (int) match->data;
|
|
|
++ if (!match)
|
|
|
++ return -ENODEV;
|
|
|
++
|
|
|
++ phy->clk = (int) match->data;
|
|
|
+
|
|
|
-+ rsthost = devm_reset_control_get(&pdev->dev, "host");
|
|
|
-+ rstdev = devm_reset_control_get(&pdev->dev, "device");
|
|
|
++ phy->rsthost = devm_reset_control_get(&pdev->dev, "host");
|
|
|
++ if (IS_ERR(phy->rsthost)) {
|
|
|
++ dev_err(dev, "host reset is missing\n");
|
|
|
++ return PTR_ERR(phy->rsthost);
|
|
|
++ }
|
|
|
++
|
|
|
++ phy->rstdev = devm_reset_control_get(&pdev->dev, "device");
|
|
|
++ if (IS_ERR(phy->rstdev)) {
|
|
|
++ dev_err(dev, "device reset is missing\n");
|
|
|
++ return PTR_ERR(phy->rstdev);
|
|
|
++ }
|
|
|
+
|
|
|
-+ rt_phy = devm_phy_create(dev, NULL, &ralink_usb_phy_ops);
|
|
|
-+ if (IS_ERR(rt_phy)) {
|
|
|
++ phy->phy = devm_phy_create(dev, NULL, &ralink_usb_phy_ops);
|
|
|
++ if (IS_ERR(phy->phy)) {
|
|
|
+ dev_err(dev, "failed to create PHY\n");
|
|
|
-+ return PTR_ERR(rt_phy);
|
|
|
++ return PTR_ERR(phy->phy);
|
|
|
+ }
|
|
|
++ phy_set_drvdata(phy->phy, phy);
|
|
|
+
|
|
|
-+ phy_provider = devm_of_phy_provider_register(dev, ralink_usb_phy_xlate);
|
|
|
++ phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
|
|
|
+
|
|
|
+ return PTR_ERR_OR_ZERO(phy_provider);
|
|
|
+}
|
John Crispin