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@@ -510,7 +510,7 @@ Signed-off-by: Daniel Golle <[email protected]>
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return 0;
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}
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-@@ -4656,6 +4803,7 @@ static const struct net_device_ops mtk_n
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+@@ -4672,6 +4819,7 @@ static const struct net_device_ops mtk_n
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static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
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{
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const __be32 *_id = of_get_property(np, "reg", NULL);
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@@ -518,7 +518,7 @@ Signed-off-by: Daniel Golle <[email protected]>
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phy_interface_t phy_mode;
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struct phylink *phylink;
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struct mtk_mac *mac;
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-@@ -4694,16 +4842,41 @@ static int mtk_add_mac(struct mtk_eth *e
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+@@ -4710,16 +4858,41 @@ static int mtk_add_mac(struct mtk_eth *e
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mac->id = id;
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mac->hw = eth;
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mac->of_node = np;
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@@ -568,7 +568,7 @@ Signed-off-by: Daniel Golle <[email protected]>
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}
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memset(mac->hwlro_ip, 0, sizeof(mac->hwlro_ip));
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-@@ -4786,8 +4959,21 @@ static int mtk_add_mac(struct mtk_eth *e
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+@@ -4802,8 +4975,21 @@ static int mtk_add_mac(struct mtk_eth *e
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phy_interface_zero(mac->phylink_config.supported_interfaces);
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__set_bit(PHY_INTERFACE_MODE_INTERNAL,
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mac->phylink_config.supported_interfaces);
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@@ -590,7 +590,7 @@ Signed-off-by: Daniel Golle <[email protected]>
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phylink = phylink_create(&mac->phylink_config,
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of_fwnode_handle(mac->of_node),
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phy_mode, &mtk_phylink_ops);
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-@@ -4838,6 +5024,26 @@ free_netdev:
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+@@ -4854,6 +5040,26 @@ free_netdev:
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return err;
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}
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@@ -617,7 +617,7 @@ Signed-off-by: Daniel Golle <[email protected]>
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void mtk_eth_set_dma_device(struct mtk_eth *eth, struct device *dma_dev)
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{
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struct net_device *dev, *tmp;
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-@@ -4984,7 +5190,8 @@ static int mtk_probe(struct platform_dev
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+@@ -5000,7 +5206,8 @@ static int mtk_probe(struct platform_dev
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regmap_write(cci, 0, 3);
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}
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@@ -627,7 +627,7 @@ Signed-off-by: Daniel Golle <[email protected]>
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err = mtk_sgmii_init(eth);
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if (err)
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-@@ -5095,6 +5302,24 @@ static int mtk_probe(struct platform_dev
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+@@ -5111,6 +5318,24 @@ static int mtk_probe(struct platform_dev
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}
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}
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@@ -652,7 +652,7 @@ Signed-off-by: Daniel Golle <[email protected]>
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if (MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_INT)) {
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err = devm_request_irq(eth->dev, eth->irq[0],
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mtk_handle_irq, 0,
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-@@ -5205,6 +5430,11 @@ static void mtk_remove(struct platform_d
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+@@ -5221,6 +5446,11 @@ static void mtk_remove(struct platform_d
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mtk_stop(eth->netdev[i]);
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mac = netdev_priv(eth->netdev[i]);
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phylink_disconnect_phy(mac->phylink);
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@@ -674,7 +674,7 @@ Signed-off-by: Daniel Golle <[email protected]>
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#include <linux/rhashtable.h>
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#include <linux/dim.h>
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#include <linux/bitfield.h>
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-@@ -516,6 +517,21 @@
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+@@ -524,6 +525,21 @@
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#define INTF_MODE_RGMII_1000 (TRGMII_MODE | TRGMII_CENTRAL_ALIGNED)
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#define INTF_MODE_RGMII_10_100 0
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@@ -696,7 +696,7 @@ Signed-off-by: Daniel Golle <[email protected]>
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/* GPIO port control registers for GMAC 2*/
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#define GPIO_OD33_CTRL8 0x4c0
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#define GPIO_BIAS_CTRL 0xed0
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-@@ -541,6 +557,7 @@
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+@@ -549,6 +565,7 @@
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#define SYSCFG0_SGMII_GMAC2 ((3 << 8) & SYSCFG0_SGMII_MASK)
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#define SYSCFG0_SGMII_GMAC1_V2 BIT(9)
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#define SYSCFG0_SGMII_GMAC2_V2 BIT(8)
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@@ -704,7 +704,7 @@ Signed-off-by: Daniel Golle <[email protected]>
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/* ethernet subsystem clock register */
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-@@ -579,6 +596,11 @@
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+@@ -587,6 +604,11 @@
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#define GEPHY_MAC_SEL BIT(1)
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/* Top misc registers */
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@@ -716,7 +716,7 @@ Signed-off-by: Daniel Golle <[email protected]>
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#define USB_PHY_SWITCH_REG 0x218
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#define QPHY_SEL_MASK GENMASK(1, 0)
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#define SGMII_QPHY_SEL 0x2
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-@@ -603,6 +625,8 @@
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+@@ -611,6 +633,8 @@
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#define MT7628_SDM_RBCNT (MT7628_SDM_OFFSET + 0x10c)
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#define MT7628_SDM_CS_ERR (MT7628_SDM_OFFSET + 0x110)
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@@ -725,7 +725,7 @@ Signed-off-by: Daniel Golle <[email protected]>
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#define MTK_FE_CDM1_FSM 0x220
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#define MTK_FE_CDM2_FSM 0x224
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#define MTK_FE_CDM3_FSM 0x238
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-@@ -611,6 +635,11 @@
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+@@ -619,6 +643,11 @@
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#define MTK_FE_CDM6_FSM 0x328
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#define MTK_FE_GDM1_FSM 0x228
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#define MTK_FE_GDM2_FSM 0x22C
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@@ -737,7 +737,7 @@ Signed-off-by: Daniel Golle <[email protected]>
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|
|
|
|
#define MTK_MAC_FSM(x) (0x1010C + ((x) * 0x100))
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|
-@@ -943,6 +972,8 @@ enum mkt_eth_capabilities {
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+@@ -951,6 +980,8 @@ enum mkt_eth_capabilities {
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|
MTK_RGMII_BIT = 0,
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MTK_TRGMII_BIT,
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MTK_SGMII_BIT,
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|
@@ -746,7 +746,7 @@ Signed-off-by: Daniel Golle <[email protected]>
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MTK_ESW_BIT,
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|
MTK_GEPHY_BIT,
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|
MTK_MUX_BIT,
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|
|
-@@ -963,8 +994,11 @@ enum mkt_eth_capabilities {
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|
+@@ -971,8 +1002,11 @@ enum mkt_eth_capabilities {
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MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT,
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MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT,
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MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT,
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|
@@ -758,7 +758,7 @@ Signed-off-by: Daniel Golle <[email protected]>
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|
|
/* PATH BITS */
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|
|
MTK_ETH_PATH_GMAC1_RGMII_BIT,
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|
|
-@@ -972,14 +1006,21 @@ enum mkt_eth_capabilities {
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|
+@@ -980,14 +1014,21 @@ enum mkt_eth_capabilities {
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|
|
MTK_ETH_PATH_GMAC1_SGMII_BIT,
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|
|
MTK_ETH_PATH_GMAC2_RGMII_BIT,
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|
|
MTK_ETH_PATH_GMAC2_SGMII_BIT,
|
|
|
@@ -780,7 +780,7 @@ Signed-off-by: Daniel Golle <[email protected]>
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|
|
#define MTK_ESW BIT_ULL(MTK_ESW_BIT)
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|
|
#define MTK_GEPHY BIT_ULL(MTK_GEPHY_BIT)
|
|
|
#define MTK_MUX BIT_ULL(MTK_MUX_BIT)
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|
|
-@@ -1002,10 +1043,16 @@ enum mkt_eth_capabilities {
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|
+@@ -1010,10 +1051,16 @@ enum mkt_eth_capabilities {
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|
|
BIT_ULL(MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT)
|
|
|
#define MTK_ETH_MUX_U3_GMAC2_TO_QPHY \
|
|
|
BIT_ULL(MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT)
|
|
|
@@ -797,7 +797,7 @@ Signed-off-by: Daniel Golle <[email protected]>
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|
|
|
|
|
/* Supported path present on SoCs */
|
|
|
#define MTK_ETH_PATH_GMAC1_RGMII BIT_ULL(MTK_ETH_PATH_GMAC1_RGMII_BIT)
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|
|
-@@ -1013,8 +1060,13 @@ enum mkt_eth_capabilities {
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|
|
+@@ -1021,8 +1068,13 @@ enum mkt_eth_capabilities {
|
|
|
#define MTK_ETH_PATH_GMAC1_SGMII BIT_ULL(MTK_ETH_PATH_GMAC1_SGMII_BIT)
|
|
|
#define MTK_ETH_PATH_GMAC2_RGMII BIT_ULL(MTK_ETH_PATH_GMAC2_RGMII_BIT)
|
|
|
#define MTK_ETH_PATH_GMAC2_SGMII BIT_ULL(MTK_ETH_PATH_GMAC2_SGMII_BIT)
|
|
|
@@ -811,7 +811,7 @@ Signed-off-by: Daniel Golle <[email protected]>
|
|
|
|
|
|
#define MTK_GMAC1_RGMII (MTK_ETH_PATH_GMAC1_RGMII | MTK_RGMII)
|
|
|
#define MTK_GMAC1_TRGMII (MTK_ETH_PATH_GMAC1_TRGMII | MTK_TRGMII)
|
|
|
-@@ -1022,7 +1074,12 @@ enum mkt_eth_capabilities {
|
|
|
+@@ -1030,7 +1082,12 @@ enum mkt_eth_capabilities {
|
|
|
#define MTK_GMAC2_RGMII (MTK_ETH_PATH_GMAC2_RGMII | MTK_RGMII)
|
|
|
#define MTK_GMAC2_SGMII (MTK_ETH_PATH_GMAC2_SGMII | MTK_SGMII)
|
|
|
#define MTK_GMAC2_GEPHY (MTK_ETH_PATH_GMAC2_GEPHY | MTK_GEPHY)
|
|
|
@@ -824,7 +824,7 @@ Signed-off-by: Daniel Golle <[email protected]>
|
|
|
|
|
|
/* MUXes present on SoCs */
|
|
|
/* 0: GDM1 -> GMAC1, 1: GDM1 -> ESW */
|
|
|
-@@ -1041,10 +1098,20 @@ enum mkt_eth_capabilities {
|
|
|
+@@ -1049,10 +1106,20 @@ enum mkt_eth_capabilities {
|
|
|
(MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII | MTK_MUX | \
|
|
|
MTK_SHARED_SGMII)
|
|
|
|
|
|
@@ -845,7 +845,7 @@ Signed-off-by: Daniel Golle <[email protected]>
|
|
|
#define MTK_HAS_CAPS(caps, _x) (((caps) & (_x)) == (_x))
|
|
|
|
|
|
#define MT7621_CAPS (MTK_GMAC1_RGMII | MTK_GMAC1_TRGMII | \
|
|
|
-@@ -1076,8 +1143,12 @@ enum mkt_eth_capabilities {
|
|
|
+@@ -1084,8 +1151,12 @@ enum mkt_eth_capabilities {
|
|
|
MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \
|
|
|
MTK_RSTCTRL_PPE1 | MTK_SRAM)
|
|
|
|
|
|
@@ -860,7 +860,7 @@ Signed-off-by: Daniel Golle <[email protected]>
|
|
|
|
|
|
struct mtk_tx_dma_desc_info {
|
|
|
dma_addr_t addr;
|
|
|
-@@ -1325,6 +1396,9 @@ struct mtk_mac {
|
|
|
+@@ -1333,6 +1404,9 @@ struct mtk_mac {
|
|
|
struct device_node *of_node;
|
|
|
struct phylink *phylink;
|
|
|
struct phylink_config phylink_config;
|
|
|
@@ -870,7 +870,7 @@ Signed-off-by: Daniel Golle <[email protected]>
|
|
|
struct mtk_eth *hw;
|
|
|
struct mtk_hw_stats *hw_stats;
|
|
|
__be32 hwlro_ip[MTK_MAX_LRO_IP_CNT];
|
|
|
-@@ -1448,6 +1522,19 @@ static inline u32 mtk_get_ib2_multicast_
|
|
|
+@@ -1456,6 +1530,19 @@ static inline u32 mtk_get_ib2_multicast_
|
|
|
return MTK_FOE_IB2_MULTICAST;
|
|
|
}
|
|
|
|
|
|
@@ -890,7 +890,7 @@ Signed-off-by: Daniel Golle <[email protected]>
|
|
|
/* read the hardware status register */
|
|
|
void mtk_stats_update_mac(struct mtk_mac *mac);
|
|
|
|
|
|
-@@ -1456,8 +1543,10 @@ u32 mtk_r32(struct mtk_eth *eth, unsigne
|
|
|
+@@ -1464,8 +1551,10 @@ u32 mtk_r32(struct mtk_eth *eth, unsigne
|
|
|
u32 mtk_m32(struct mtk_eth *eth, u32 mask, u32 set, unsigned int reg);
|
|
|
|
|
|
int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id);
|
Mieczyslaw Nalewaj