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@@ -9,12 +9,20 @@ reads.
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Signed-off-by: Jonas Gorski <[email protected]>
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---
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- arch/mips/bcm63xx/dev-flash.c | 36 ++++++++++++++++++++++++++++++++++++
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- 1 file changed, 36 insertions(+)
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+ arch/mips/bcm63xx/dev-flash.c | 51 ++++++++++++++++++++++++++++++++++++
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+ 1 file changed, 51 insertions(+)
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--- a/arch/mips/bcm63xx/dev-flash.c
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+++ b/arch/mips/bcm63xx/dev-flash.c
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-@@ -110,9 +110,46 @@ static int __init bcm63xx_detect_flash_t
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+@@ -16,6 +16,7 @@
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+ #include <linux/mtd/mtd.h>
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+ #include <linux/mtd/partitions.h>
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+ #include <linux/mtd/physmap.h>
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++#include <linux/mtd/spi-nor.h>
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+
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+ #include <bcm63xx_cpu.h>
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+ #include <bcm63xx_dev_flash.h>
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+@@ -110,9 +111,59 @@ static int __init bcm63xx_detect_flash_t
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}
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}
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@@ -24,36 +32,49 @@ Signed-off-by: Jonas Gorski <[email protected]>
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+#define FLASH_CTRL_ADDR_BYTES_2 (0 << 8)
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+#define FLASH_CTRL_ADDR_BYTES_3 (1 << 8)
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+#define FLASH_CTRL_ADDR_BYTES_4 (2 << 8)
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++#define FLASH_CTRL_DUMMY_BYTES_SHIFT 10
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++#define FLASH_CTRL_DUMMY_BYTES_MASK (0x3 << FLASH_CTRL_DUMMY_BYTES_SHIFT)
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+#define FLASH_CTRL_MB_EN (1 << 23)
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+
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void __init bcm63xx_flash_detect(void)
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{
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flash_type = bcm63xx_detect_flash_type();
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+
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-+ /* reduce flash mapping to single i/o reads for safety */
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++ /* ensure flash mapping has sane values */
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+ if (flash_type == BCM63XX_FLASH_TYPE_SERIAL &&
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+ (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() ||
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+ BCMCPU_IS_63268())) {
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+ u32 val = bcm_rset_readl(RSET_HSSPI, HSSPI_FLASH_CTRL_REG);
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+
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-+ if (!(val & FLASH_CTRL_MB_EN))
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-+ return;
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++ if (val & FLASH_CTRL_MB_EN) {
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++ /* cfe might configure non working dual-io mode */
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++ val &= ~FLASH_CTRL_MB_EN;
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++ val &= ~FLASH_CTRL_READ_OPCODE_MASK;
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++ val &= ~FLASH_CTRL_DUMMY_BYTES_MASK;
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++ val |= 1 << FLASH_CTRL_DUMMY_BYTES_SHIFT;
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++
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++ switch (val & FLASH_CTRL_ADDR_BYTES_MASK) {
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++ case FLASH_CTRL_ADDR_BYTES_3:
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++ val |= SPINOR_OP_READ_FAST;
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++ break;
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++ case FLASH_CTRL_ADDR_BYTES_4:
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++ val |= SPINOR_OP_READ4_FAST;
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++ break;
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++ case FLASH_CTRL_ADDR_BYTES_2:
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++ default:
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++ pr_warn("unsupported address byte mode (%x), not fixing up\n",
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++ val & FLASH_CTRL_ADDR_BYTES_MASK);
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++ return;
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++ }
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++ } else {
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++ /* ensure dummy bytes is set to 1 for _FAST reads */
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++ u8 cmd = val & FLASH_CTRL_READ_OPCODE_MASK;
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+
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-+ val &= ~FLASH_CTRL_MB_EN;
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-+ val &= ~FLASH_CTRL_READ_OPCODE_MASK;
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++ if (cmd != SPINOR_OP_READ_FAST && cmd != SPINOR_OP_READ4_FAST)
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++ return;
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+
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-+ switch (val & FLASH_CTRL_ADDR_BYTES_MASK) {
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-+ case FLASH_CTRL_ADDR_BYTES_3:
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-+ val |= 0x0b; /* OPCODE_FAST_READ */
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-+ break;
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-+ case FLASH_CTRL_ADDR_BYTES_4:
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-+ val |= 0x0c; /* OPCODE_FAST_READ_4B */
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-+ break;
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-+ case FLASH_CTRL_ADDR_BYTES_2:
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-+ default:
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-+ pr_warn("unsupported address byte mode (%x), not fixing up\n",
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-+ val & FLASH_CTRL_ADDR_BYTES_MASK);
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-+ return;
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++ val &= ~FLASH_CTRL_DUMMY_BYTES_MASK;
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++ val |= 1 << FLASH_CTRL_DUMMY_BYTES_SHIFT;
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+ }
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+
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+ bcm_rset_writel(RSET_HSSPI, val, HSSPI_FLASH_CTRL_REG);
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