ramips: fix some clocks in mt7621.dtsi

As the cpu clock calculation has been fixed, the clock for gic and spi
should be also fixed.

Signed-off-by: Weijie Gao <[email protected]>

target/linux/ramips/dts/mt7621.dtsi

@@ -41,14 +41,6 @@
 		clock-output-names = "cpu", "bus";
 	};
 
-	cpuclock: cpuclock {
-		#clock-cells = <0>;
-		compatible = "fixed-clock";
-
-		/* FIXME: there should be way to detect this */
-		clock-frequency = <880000000>;
-	};
-
 	sysclock: sysclock {
 		#clock-cells = <0>;
 		compatible = "fixed-clock";
@@ -176,7 +168,6 @@
 			compatible = "ns16550a";
 			reg = <0xc00 0x100>;
 
-			clocks = <&sysclock>;
 			clock-frequency = <50000000>;
 
 			interrupt-parent = <&gic>;
@@ -193,7 +184,7 @@
 			compatible = "ralink,mt7621-spi";
 			reg = <0xb00 0x100>;
 
-			clocks = <&sysclock>;
+			clocks = <&pll MT7621_CLK_BUS>;
 
 			resets = <&rstctrl 18>;
 			reset-names = "spi";
@@ -402,7 +393,7 @@
 		timer {
 			compatible = "mti,gic-timer";
 			interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
-			clocks = <&cpuclock>;
+			clocks = <&pll MT7621_CLK_CPU>;
 		};
 	};