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@@ -0,0 +1,231 @@
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+Instead of defining an enumeration with the FW specific values for the
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+different clock rates, use the actual frequency instead. Also add a
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+boolean to specify whether the clock is XTAL or not.
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+
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+Change all board files to reflect this.
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+
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+Additionally, this reverts commit 26f45c (ARM: OMAP2+: Legacy support
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+for wl12xx when booted with devicetree), since this is not be needed
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+anymore, now that DT support for WiLink is implemented.
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+
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+Cc: Tony Lindgren <[email protected]>
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+Cc: Sekhar Nori <[email protected]>
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+Signed-off-by: Luciano Coelho <[email protected]>
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+Reviewed-by: Felipe Balbi <[email protected]>
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+
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+---
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+ arch/arm/mach-davinci/board-da850-evm.c | 3 +-
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+ arch/arm/mach-omap2/board-omap3evm.c | 3 +-
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+ arch/arm/mach-omap2/board-zoom-peripherals.c | 3 +-
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+ arch/arm/mach-omap2/devices.c | 39 -------------------
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+ drivers/net/wireless/ti/wl12xx/main.c | 58 +++++++++++++++++++++++++++-
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+ drivers/net/wireless/ti/wl12xx/wl12xx.h | 28 ++++++++++++++
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+ include/linux/wl12xx.h | 27 ++-----------
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+ 7 files changed, 93 insertions(+), 68 deletions(-)
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+
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+--- a/drivers/net/wireless/ti/wl12xx/main.c
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++++ b/drivers/net/wireless/ti/wl12xx/main.c
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+@@ -1711,6 +1711,43 @@ static struct ieee80211_sta_ht_cap wl12x
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+ },
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+ };
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+
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++static const struct wl12xx_clock wl12xx_refclock_table[] = {
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++ { 19200000, false, WL12XX_REFCLOCK_19 },
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++ { 26000000, false, WL12XX_REFCLOCK_26 },
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++ { 26000000, true, WL12XX_REFCLOCK_26_XTAL },
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++ { 38400000, false, WL12XX_REFCLOCK_38 },
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++ { 38400000, true, WL12XX_REFCLOCK_38_XTAL },
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++ { 52000000, false, WL12XX_REFCLOCK_52 },
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++ { 0, false, 0 }
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++};
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++
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++static const struct wl12xx_clock wl12xx_tcxoclock_table[] = {
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++ { 16368000, true, WL12XX_TCXOCLOCK_16_368 },
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++ { 16800000, true, WL12XX_TCXOCLOCK_16_8 },
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++ { 19200000, true, WL12XX_TCXOCLOCK_19_2 },
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++ { 26000000, true, WL12XX_TCXOCLOCK_26 },
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++ { 32736000, true, WL12XX_TCXOCLOCK_32_736 },
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++ { 33600000, true, WL12XX_TCXOCLOCK_33_6 },
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++ { 38400000, true, WL12XX_TCXOCLOCK_38_4 },
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++ { 52000000, true, WL12XX_TCXOCLOCK_52 },
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++ { 0, false, 0 }
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++};
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++
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++static int wl12xx_get_clock_idx(const struct wl12xx_clock *table,
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++ u32 freq, bool xtal)
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++{
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++ int i = 0;
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++
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++ while(table[i].freq != 0) {
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++ if ((table[i].freq == freq) &&
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++ (table[i].xtal == xtal))
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++ return table[i].hw_idx;
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++ i++;
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++ };
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++
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++ return -EINVAL;
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++}
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++
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+ static int wl12xx_setup(struct wl1271 *wl)
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+ {
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+ struct wl12xx_priv *priv = wl->priv;
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+@@ -1732,7 +1769,16 @@ static int wl12xx_setup(struct wl1271 *w
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+ wl12xx_conf_init(wl);
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+
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+ if (!fref_param) {
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+- priv->ref_clock = pdata->board_ref_clock;
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++ priv->ref_clock = wl12xx_get_clock_idx(wl12xx_refclock_table,
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++ pdata->ref_clock_freq,
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++ pdata->ref_clock_xtal);
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++ if (priv->ref_clock < 0) {
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++ wl1271_error("Invalid ref_clock frequency (%d Hz, %s)",
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++ pdata->ref_clock_freq,
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++ pdata->ref_clock_xtal ? "XTAL" : "not XTAL");
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++
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++ return priv->ref_clock;
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++ }
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+ } else {
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+ if (!strcmp(fref_param, "19.2"))
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+ priv->ref_clock = WL12XX_REFCLOCK_19;
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+@@ -1751,7 +1797,15 @@ static int wl12xx_setup(struct wl1271 *w
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+ }
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+
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+ if (!tcxo_param) {
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+- priv->tcxo_clock = pdata->board_tcxo_clock;
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++ priv->tcxo_clock = wl12xx_get_clock_idx(wl12xx_tcxoclock_table,
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++ pdata->tcxo_clock_freq,
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++ true);
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++ if (priv->tcxo_clock < 0) {
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++ wl1271_error("Invalid tcxo_clock frequency (%d Hz)",
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++ pdata->tcxo_clock_freq);
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++
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++ return priv->tcxo_clock;
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++ }
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+ } else {
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+ if (!strcmp(tcxo_param, "19.2"))
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+ priv->tcxo_clock = WL12XX_TCXOCLOCK_19_2;
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+--- a/drivers/net/wireless/ti/wl12xx/wl12xx.h
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++++ b/drivers/net/wireless/ti/wl12xx/wl12xx.h
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+@@ -79,4 +79,32 @@ struct wl12xx_priv {
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+ struct wl127x_rx_mem_pool_addr *rx_mem_addr;
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+ };
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+
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++/* Reference clock values */
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++enum {
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++ WL12XX_REFCLOCK_19 = 0, /* 19.2 MHz */
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++ WL12XX_REFCLOCK_26 = 1, /* 26 MHz */
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++ WL12XX_REFCLOCK_38 = 2, /* 38.4 MHz */
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++ WL12XX_REFCLOCK_52 = 3, /* 52 MHz */
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++ WL12XX_REFCLOCK_38_XTAL = 4, /* 38.4 MHz, XTAL */
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++ WL12XX_REFCLOCK_26_XTAL = 5, /* 26 MHz, XTAL */
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++};
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++
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++/* TCXO clock values */
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++enum {
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++ WL12XX_TCXOCLOCK_19_2 = 0, /* 19.2MHz */
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++ WL12XX_TCXOCLOCK_26 = 1, /* 26 MHz */
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++ WL12XX_TCXOCLOCK_38_4 = 2, /* 38.4MHz */
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++ WL12XX_TCXOCLOCK_52 = 3, /* 52 MHz */
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++ WL12XX_TCXOCLOCK_16_368 = 4, /* 16.368 MHz */
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++ WL12XX_TCXOCLOCK_32_736 = 5, /* 32.736 MHz */
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++ WL12XX_TCXOCLOCK_16_8 = 6, /* 16.8 MHz */
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++ WL12XX_TCXOCLOCK_33_6 = 7, /* 33.6 MHz */
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++};
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++
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++struct wl12xx_clock {
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++ u32 freq;
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++ bool xtal;
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++ u8 hw_idx;
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++};
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++
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+ #endif /* __WL12XX_PRIV_H__ */
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+--- a/include/linux/wl12xx.h
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++++ b/include/linux/wl12xx.h
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+@@ -26,28 +26,6 @@
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+
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+ #include <linux/err.h>
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+
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+-/* Reference clock values */
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+-enum {
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+- WL12XX_REFCLOCK_19 = 0, /* 19.2 MHz */
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+- WL12XX_REFCLOCK_26 = 1, /* 26 MHz */
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+- WL12XX_REFCLOCK_38 = 2, /* 38.4 MHz */
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+- WL12XX_REFCLOCK_52 = 3, /* 52 MHz */
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+- WL12XX_REFCLOCK_38_XTAL = 4, /* 38.4 MHz, XTAL */
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+- WL12XX_REFCLOCK_26_XTAL = 5, /* 26 MHz, XTAL */
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+-};
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+-
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+-/* TCXO clock values */
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+-enum {
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+- WL12XX_TCXOCLOCK_19_2 = 0, /* 19.2MHz */
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+- WL12XX_TCXOCLOCK_26 = 1, /* 26 MHz */
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+- WL12XX_TCXOCLOCK_38_4 = 2, /* 38.4MHz */
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+- WL12XX_TCXOCLOCK_52 = 3, /* 52 MHz */
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+- WL12XX_TCXOCLOCK_16_368 = 4, /* 16.368 MHz */
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+- WL12XX_TCXOCLOCK_32_736 = 5, /* 32.736 MHz */
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+- WL12XX_TCXOCLOCK_16_8 = 6, /* 16.8 MHz */
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+- WL12XX_TCXOCLOCK_33_6 = 7, /* 33.6 MHz */
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+-};
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+-
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+ struct wl1251_platform_data {
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+ void (*set_power)(bool enable);
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+ /* SDIO only: IRQ number if WLAN_IRQ line is used, 0 for SDIO IRQs */
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+@@ -57,8 +35,9 @@ struct wl1251_platform_data {
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+
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+ struct wl12xx_platform_data {
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+ int irq;
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+- int board_ref_clock;
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+- int board_tcxo_clock;
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++ int ref_clock_freq; /* in Hertz */
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++ bool ref_clock_xtal; /* specify whether the clock is XTAL or not */
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++ int tcxo_clock_freq; /* in Hertz, tcxo is always XTAL */
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+ };
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+
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+ #ifdef CONFIG_WILINK_PLATFORM_DATA
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+--- a/arch/arm/mach-omap2/pdata-quirks.c
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++++ b/arch/arm/mach-omap2/pdata-quirks.c
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+@@ -50,8 +50,8 @@ static void __init __used legacy_init_wl
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+ {
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+ int res;
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+
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+- wl12xx.board_ref_clock = ref_clock;
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+- wl12xx.board_tcxo_clock = tcxo_clock;
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++ wl12xx.ref_clock_freq = ref_clock;
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++ wl12xx.tcxo_clock_freq = tcxo_clock;
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+ wl12xx.irq = gpio_to_irq(gpio);
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+
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+ res = wl12xx_set_platform_data(&wl12xx);
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+@@ -85,12 +85,12 @@ static void __init omap3_igep0020_legacy
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+
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+ static void __init omap3_evm_legacy_init(void)
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+ {
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+- legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 149);
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++ legacy_init_wl12xx(38400000, 0, 149);
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+ }
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+
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+ static void __init omap3_zoom_legacy_init(void)
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+ {
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+- legacy_init_wl12xx(WL12XX_REFCLOCK_26, 0, 162);
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++ legacy_init_wl12xx(26000000, 0, 162);
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+ }
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+ #endif /* CONFIG_ARCH_OMAP3 */
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+
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+@@ -98,15 +98,15 @@ static void __init omap3_zoom_legacy_ini
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+ static void __init omap4_sdp_legacy_init(void)
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+ {
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+ omap_4430sdp_display_init_of();
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+- legacy_init_wl12xx(WL12XX_REFCLOCK_26,
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+- WL12XX_TCXOCLOCK_26, 53);
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++ legacy_init_wl12xx(26000000,
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++ 26000000, 53);
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+ }
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+
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+ static void __init omap4_panda_legacy_init(void)
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+ {
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+ omap4_panda_display_init_of();
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+ legacy_init_ehci_clk("auxclk3_ck");
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+- legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 53);
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++ legacy_init_wl12xx(38400000, 0, 53);
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+ }
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+ #endif
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+
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