lantiq: fix pci driver once again

In my previous attempt to solve the PCI problems for the lantiq targets,
I did not pay attention to the fact that the original accesses to the
GPIO took place in RAW mode. As a result, the polarity defined in the
device trees (apart from the initial value) was irrelevant.

In addition, the expected name of the GPIO in the dts has changed due to
the upstream change and therefore no RESET is currently performed.

As discussed in [1] on the linux-mips mailing list, we will now adapt
the dts files accordingly instead of patching the driver:

- dts property will be renamed to "reset-gpios"
- Polarity is set to "GPIO_ACTIVE_LOW".

I have verified this with a TP-Link TD-W8980. The PCI device is now
recognized by the system.

[1] https://patchwork.kernel.org/project/linux-mips/patch/[email protected]/

Signed-off-by: Martin Schiller <[email protected]>
Tested-by: Aleksander Jan Bajkowski <[email protected]> # Tested on AVM 7330 (ar9)
Link: https://github.com/openwrt/openwrt/pull/15731
Signed-off-by: Robert Marko <[email protected]>

target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_avm_fritz7312.dts

@@ -177,7 +177,7 @@
 	pinctrl-names = "default";
 
 	req-mask = <0xf>;
-	gpio-reset = <&gpio 21 GPIO_ACTIVE_LOW>;
+	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 
 	wifi@0,0 {
 		compatible = "pci0,0";

target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_avm_fritz7320.dts

@@ -203,7 +203,7 @@
 		    <&pci_req3_pins>, <&pci_req4_pins>;
 
 	req-mask = <0xf>;
-	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 
 	wifi@0,0 {
 		compatible = "pci0,0";

target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_bt_homehub-v3a.dts

@@ -177,7 +177,7 @@
 	pinctrl-0 = <&pci_gnt1_pins>, <&pci_req1_pins>;
 	pinctrl-names = "default";
 
-	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 
 	wifi@7000 {
 		reg = <0x7000 0 0 0 0>;

target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_netgear_dgn3500.dtsi

@@ -133,7 +133,7 @@
 	pinctrl-0 = <&pci_gnt1_pins>, <&pci_req1_pins>;
 	pinctrl-names = "default";
 
-	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 
 	wifi@168c,0029 {
 		compatible = "pci168c,0029";

target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv4510pw.dts

@@ -203,7 +203,7 @@
 		0x7800 0 0 2 &icu0 66
 		0x7800 0 0 3 &icu0 66
 	>;
-	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 	req-mask = <0x7>;
 };
 

target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv4518pwr01.dtsi

@@ -192,7 +192,7 @@
 		    <&pci_req1_pins>, <&pci_req2_pins>;
 	pinctrl-names = "default";
 
-	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 	req-mask = <0xf>;
 };
 

target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv4519pw.dts

@@ -203,7 +203,7 @@
 &pci0 {
 	status = "okay";
 	lantiq,external-clock;
-	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 	req-mask = <0xf>;
 };
 

target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv4520pw.dts

@@ -218,7 +218,7 @@
 	pinctrl-names = "default";
 
 	lantiq,external-clock;
-	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 };
 
 &usb_phy {

target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv4525pw.dts

@@ -152,7 +152,7 @@
 	pinctrl-0 = <&pci_gnt1_pins>, <&pci_req1_pins>;
 	pinctrl-names = "default";
 
-	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 };
 
 /* #define ARV4525PW_RELAY		31 */

target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv452cqw.dts

@@ -238,7 +238,7 @@
 	pinctrl-names = "default";
 
 	lantiq,external-clock;
-	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 };
 
 &usb_phy {

target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7506pw11.dts

@@ -164,7 +164,7 @@
 	pinctrl-names = "default";
 
 	lantiq,external-clock;
-	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 
 	wifi@1814,3592 {
 		compatible = "pci1814,3592";

target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7510pw22.dts

@@ -181,7 +181,7 @@
 		0x7800 0 0 2 &icu0 135
 		0x7800 0 0 3 &icu0 135
 	>;
-	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 	req-mask = <0x3>;
 
 	wifi@1814,3592 {

target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7518pw.dts

@@ -225,7 +225,7 @@
 	pinctrl-0 = <&pci_gnt1_pins>, <&pci_req1_pins>;
 	pinctrl-names = "default";
 
-	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 	lantiq,external-clock;
 	req-mask = <0xf>;
 

target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv7519pw.dts

@@ -201,7 +201,7 @@
 	pinctrl-names = "default";
 
 	lantiq,external-clock;
-	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 	req-mask = <0xf>;
 
 	wifi@0,0 {

target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv752dpw.dts

@@ -227,7 +227,7 @@
 	pinctrl-names = "default";
 
 	lantiq,external-clock;
-	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 	interrupt-map = <0x7000 0 0 1 &icu0 135>;
 	req-mask = <0x3>;
 

target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv752dpw22.dts

@@ -248,7 +248,7 @@
 		0x7800 0 0 2 &icu0 135
 		0x7800 0 0 3 &icu0 135
 	>;
-	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 	req-mask = <0x3>;
 
 	wifi@1814,3592 {

target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_arcadyan_arv8539pw22.dts

@@ -170,7 +170,7 @@
 	pinctrl-0 = <&pci_gnt1_pins>, <&pci_req1_pins>;
 	pinctrl-names = "default";
 
-	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 
 	wifi@168c,0029 {
 		compatible = "pci168c,0029";

target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_bt_homehub-v2b.dts

@@ -219,7 +219,7 @@
 	pinctrl-0 = <&pci_gnt1_pins>, <&pci_req1_pins>;
 	pinctrl-names = "default";
 
-	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 
 	wifi@168c,0027 {
 		compatible = "pci168c,0027";

target/linux/lantiq/files/arch/mips/boot/dts/lantiq/danube_siemens_gigaset-sx76x.dts

@@ -99,7 +99,7 @@
 
 &pci0 {
 	status = "okay";
-	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 };
 
 &usb_phy {

target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vgv7510kw22.dtsi

@@ -230,7 +230,7 @@
 
 &pci0 {
 	status = "okay";
-	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 
 	wifi@1814,3592 {
 		compatible = "pci1814,3592";

target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vgv7519.dtsi

@@ -248,7 +248,7 @@
 
 &pci0 {
 	status = "okay";
-	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 
 	wifi@1814,3091 {
 		compatible = "pci1814,3091";

target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vrv9510kwac23.dts

@@ -326,7 +326,7 @@
 	pinctrl-0 = <&pci_gnt1_pins>, <&pci_req1_pins>;
 	pinctrl-names = "default";
 
-	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 };
 
 &pcie0 {

target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_bt_homehub-v5a.dts

@@ -260,7 +260,7 @@
 
 &pci0 {
 	status = "okay";
-	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 
 	wifi@168c,002d {
 		compatible = "pci168c,002d";

target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_tdw8980.dts

@@ -25,5 +25,5 @@
 &pci0 {
 	status = "okay";
 
-	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 };

target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_vr200.dtsi

@@ -205,7 +205,7 @@
 
 &pci0 {
 	status = "okay";
-	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 };
 
 &spi {

target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_zyxel_p-2812hnu-fx.dtsi

@@ -216,7 +216,7 @@
 	pinctrl-0 = <&pci_gnt1_pins>, <&pci_req1_pins>;
 	pinctrl-names = "default";
 
-	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 };
 
 &stp {

target/linux/lantiq/patches-6.1/0002-MIPS-pci-lantiq-restore-reset-gpio-polarity.patch

@@ -1,62 +0,0 @@
-From f038380835033e376d89c72516f087254792bbad Mon Sep 17 00:00:00 2001
-From: Martin Schiller <[email protected]>
-Date: Mon, 6 May 2024 09:41:42 +0200
-Subject: [PATCH] MIPS: pci: lantiq: restore reset gpio polarity
-
-Commit 90c2d2eb7ab5 ("MIPS: pci: lantiq: switch to using gpiod API") not
-only switched to the gpiod API, but also inverted / changed the polarity
-of the GPIO.
-
-According to the PCI specification, the RST# pin is an active-low
-signal. However, most of the device trees that have been widely used for
-a long time (mainly in the openWrt project) define this GPIO as
-active-high and the old driver code inverted the signal internally.
-
-Apparently there are actually boards where the reset gpio must be
-operated inverted. For this reason, we cannot use the GPIOD_OUT_LOW/HIGH
-flag for initialization. Instead, we must explicitly set the gpio to
-value 1 in order to take into account any "GPIO_ACTIVE_LOW" flag that
-may have been set.
-
-In order to remain compatible with all these existing device trees, we
-should therefore keep the logic as it was before the commit.
-
-Fixes: 90c2d2eb7ab5 ("MIPS: pci: lantiq: switch to using gpiod API")
-Cc: [email protected]
-Signed-off-by: Martin Schiller <[email protected]>
----
- arch/mips/pci/pci-lantiq.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/arch/mips/pci/pci-lantiq.c
-+++ b/arch/mips/pci/pci-lantiq.c
-@@ -124,14 +124,14 @@ static int ltq_pci_startup(struct platfo
- 		clk_disable(clk_external);
- 
- 	/* setup reset gpio used by pci */
--	reset_gpio = devm_gpiod_get_optional(&pdev->dev, "reset",
--					     GPIOD_OUT_LOW);
-+	reset_gpio = devm_gpiod_get_optional(&pdev->dev, "reset", GPIOD_ASIS);
- 	error = PTR_ERR_OR_ZERO(reset_gpio);
- 	if (error) {
- 		dev_err(&pdev->dev, "failed to request gpio: %d\n", error);
- 		return error;
- 	}
- 	gpiod_set_consumer_name(reset_gpio, "pci_reset");
-+	gpiod_direction_output(reset_gpio, 1);
- 
- 	/* enable auto-switching between PCI and EBU */
- 	ltq_pci_w32(0xa, PCI_CR_CLK_CTRL);
-@@ -194,10 +194,10 @@ static int ltq_pci_startup(struct platfo
- 
- 	/* toggle reset pin */
- 	if (reset_gpio) {
--		gpiod_set_value_cansleep(reset_gpio, 1);
-+		gpiod_set_value_cansleep(reset_gpio, 0);
- 		wmb();
- 		mdelay(1);
--		gpiod_set_value_cansleep(reset_gpio, 0);
-+		gpiod_set_value_cansleep(reset_gpio, 1);
- 	}
- 	return 0;
- }

target/linux/lantiq/patches-6.6/0002-MIPS-pci-lantiq-restore-reset-gpio-polarity.patch

@@ -1,62 +0,0 @@
-From f038380835033e376d89c72516f087254792bbad Mon Sep 17 00:00:00 2001
-From: Martin Schiller <[email protected]>
-Date: Mon, 6 May 2024 09:41:42 +0200
-Subject: [PATCH] MIPS: pci: lantiq: restore reset gpio polarity
-
-Commit 90c2d2eb7ab5 ("MIPS: pci: lantiq: switch to using gpiod API") not
-only switched to the gpiod API, but also inverted / changed the polarity
-of the GPIO.
-
-According to the PCI specification, the RST# pin is an active-low
-signal. However, most of the device trees that have been widely used for
-a long time (mainly in the openWrt project) define this GPIO as
-active-high and the old driver code inverted the signal internally.
-
-Apparently there are actually boards where the reset gpio must be
-operated inverted. For this reason, we cannot use the GPIOD_OUT_LOW/HIGH
-flag for initialization. Instead, we must explicitly set the gpio to
-value 1 in order to take into account any "GPIO_ACTIVE_LOW" flag that
-may have been set.
-
-In order to remain compatible with all these existing device trees, we
-should therefore keep the logic as it was before the commit.
-
-Fixes: 90c2d2eb7ab5 ("MIPS: pci: lantiq: switch to using gpiod API")
-Cc: [email protected]
-Signed-off-by: Martin Schiller <[email protected]>
----
- arch/mips/pci/pci-lantiq.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/arch/mips/pci/pci-lantiq.c
-+++ b/arch/mips/pci/pci-lantiq.c
-@@ -124,14 +124,14 @@ static int ltq_pci_startup(struct platfo
- 		clk_disable(clk_external);
- 
- 	/* setup reset gpio used by pci */
--	reset_gpio = devm_gpiod_get_optional(&pdev->dev, "reset",
--					     GPIOD_OUT_LOW);
-+	reset_gpio = devm_gpiod_get_optional(&pdev->dev, "reset", GPIOD_ASIS);
- 	error = PTR_ERR_OR_ZERO(reset_gpio);
- 	if (error) {
- 		dev_err(&pdev->dev, "failed to request gpio: %d\n", error);
- 		return error;
- 	}
- 	gpiod_set_consumer_name(reset_gpio, "pci_reset");
-+	gpiod_direction_output(reset_gpio, 1);
- 
- 	/* enable auto-switching between PCI and EBU */
- 	ltq_pci_w32(0xa, PCI_CR_CLK_CTRL);
-@@ -194,10 +194,10 @@ static int ltq_pci_startup(struct platfo
- 
- 	/* toggle reset pin */
- 	if (reset_gpio) {
--		gpiod_set_value_cansleep(reset_gpio, 1);
-+		gpiod_set_value_cansleep(reset_gpio, 0);
- 		wmb();
- 		mdelay(1);
--		gpiod_set_value_cansleep(reset_gpio, 0);
-+		gpiod_set_value_cansleep(reset_gpio, 1);
- 	}
- 	return 0;
- }