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@@ -0,0 +1,281 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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+
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+#include "rtl839x.dtsi"
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+
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+#include <dt-bindings/input/input.h>
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+#include <dt-bindings/gpio/gpio.h>
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+
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+/ {
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+ compatible = "edgecore,ecs4100-12ph", "realtek,rtl839x-soc";
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+ model = "Edgecore ECS4100-12PH Switch";
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+
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+ aliases {
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+ label-mac-device = ðernet0;
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+ led-boot = &led_sys;
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+ led-failsafe = &led_sys;
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+ led-running = &led_sys;
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+ led-upgrade = &led_sys;
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+ };
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+
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+ memory@0 {
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+ device_type = "memory";
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+ reg = <0x0 0x10000000>;
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+ };
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+
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+ leds {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinmux_disable_sys_led>;
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+ compatible = "gpio-leds";
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+
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+ led_sys: sys {
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+ label = "green:sys";
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+ gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
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+ };
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+ };
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+
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+ gpio-restart {
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+ compatible = "gpio-restart";
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+ gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ i2c0: i2c-gpio-0 {
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+ compatible = "i2c-gpio";
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+ sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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+ scl-gpios = <&gpio1 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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+ i2c-gpio,delay-us = <2>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ };
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+
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+ sfp0: sfp-p9 {
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+ compatible = "sff,sfp";
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+ i2c-bus = <&i2c0>;
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+ los-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
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+ mod-def0-gpio = <&gpio1 8 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ i2c1: i2c-gpio-1 {
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+ compatible = "i2c-gpio";
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+ sda-gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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+ scl-gpios = <&gpio1 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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+ i2c-gpio,delay-us = <2>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ };
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+
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+ sfp1: sfp-p10 {
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+ compatible = "sff,sfp";
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+ i2c-bus = <&i2c1>;
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+ los-gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
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+ mod-def0-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ i2c2: i2c-gpio-2 {
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+ compatible = "i2c-gpio";
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+ sda-gpios = <&gpio1 22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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+ scl-gpios = <&gpio1 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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+ i2c-gpio,delay-us = <2>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ };
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+
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+ sfp2: sfp-p11 {
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+ compatible = "sff,sfp";
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+ i2c-bus = <&i2c2>;
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+ los-gpio = <&gpio0 21 GPIO_ACTIVE_HIGH>;
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+ mod-def0-gpio = <&gpio1 24 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ i2c3: i2c-gpio-3 {
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+ compatible = "i2c-gpio";
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+ sda-gpios = <&gpio1 11 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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+ scl-gpios = <&gpio1 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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+ i2c-gpio,delay-us = <2>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ };
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+
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+ sfp3: sfp-p12 {
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+ compatible = "sff,sfp";
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+ i2c-bus = <&i2c3>;
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+ los-gpio = <&gpio0 22 GPIO_ACTIVE_HIGH>;
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+ mod-def0-gpio = <&gpio1 13 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ i2c4: i2c-gpio-4 {
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+ compatible = "i2c-gpio";
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+ sda-gpios = <&gpio1 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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+ scl-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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+ i2c-gpio,delay-us = <2>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ lm75b@48 {
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+ compatible = "nxp,lm75a";
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+ reg = <0x48>;
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+ };
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+
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+ eeprom@56 {
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+ compatible = "atmel,24c32";
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+ reg = <0x56>;
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+ };
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+ };
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+
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+ watchdog {
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+ compatible = "linux,wdt-gpio";
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+ gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
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+ hw_algo = "toggle";
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+ hw_margin_ms = <1200>;
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+ };
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+};
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+
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+ðernet0 {
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+ nvmem-cells = <&macaddr_factory>;
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+ nvmem-cell-names = "mac-address";
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+};
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+
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+&gpio0 {
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+ poe_enable {
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+ gpio-hog;
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+ gpios = <16 GPIO_ACTIVE_HIGH>;
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+ output-high;
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+ };
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+
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+ poe_reset {
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+ gpio-hog;
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+ gpios = <18 GPIO_ACTIVE_HIGH>;
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+ output-high;
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+ };
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+};
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+
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+&mdio_aux {
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+ status = "okay";
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+
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+ gpio1: expander@3 {
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+ compatible = "realtek,rtl8231";
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+ reg = <3>;
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+
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ gpio-ranges = <&gpio1 0 0 37>;
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+
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+ led-controller {
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+ compatible = "realtek,rtl8231-leds";
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+ status = "disabled";
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+ };
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+ };
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+};
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+
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+&mdio_bus0 {
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+ reset-gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
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+ reset-delay-us = <2000>;
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+ reset-post-delay-us = <140000>;
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+
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+ /* External phy RTL8218B */
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+ EXTERNAL_PHY(0)
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+ EXTERNAL_PHY(1)
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+ EXTERNAL_PHY(2)
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+ EXTERNAL_PHY(3)
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+ EXTERNAL_PHY(4)
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+ EXTERNAL_PHY(5)
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+ EXTERNAL_PHY(6)
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+ EXTERNAL_PHY(7)
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+
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+ /* External phy RTL8214FC */
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+ EXTERNAL_SFP_PHY_FULL(48, 0)
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+ EXTERNAL_SFP_PHY_FULL(49, 1)
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+ EXTERNAL_SFP_PHY_FULL(50, 2)
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+ EXTERNAL_SFP_PHY_FULL(51, 3)
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+};
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+
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+&spi0 {
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+ status = "okay";
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+
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+ flash@0 {
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+ compatible = "jedec,spi-nor";
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+ reg = <0>;
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+ spi-max-frequency = <10000000>;
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+
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+ partitions {
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+ compatible = "fixed-partitions";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ partition@0 {
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+ label = "u-boot";
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+ reg = <0x0 0x40000>;
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+ read-only;
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+ };
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+ partition@100000 {
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+ compatible = "u-boot,env";
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+ label = "u-boot-env";
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+ reg = <0x100000 0x20000>;
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+ };
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+ partition@120000 {
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+ label = "empty";
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+ reg = <0x120000 0x60000>;
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+ read-only;
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+ };
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+ partition@180000 {
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+ label = "para";
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+ reg = <0x180000 0x20000>;
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+ read-only;
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+
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+ nvmem-layout {
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+ compatible = "fixed-layout";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ macaddr_factory: macaddr@0 {
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+ reg = <0x0 0x6>;
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+ };
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+ };
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+ };
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+ partition@200000 {
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+ label = "firmware";
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+ reg = <0x200000 0xdf0000>;
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+ compatible = "openwrt,uimage", "denx,uimage";
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+ };
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+ partition@ff0000 {
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+ label = "certificates";
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+ reg = <0xff0000 0x10000>;
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+ };
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+ };
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+ };
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+};
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+
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+&switch0 {
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+ ports {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ SWITCH_PORT_SDS(0, 1, 0, qsgmii)
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+ SWITCH_PORT_SDS(1, 2, 0, qsgmii)
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+ SWITCH_PORT_SDS(2, 3, 0, qsgmii)
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+ SWITCH_PORT_SDS(3, 4, 0, qsgmii)
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+ SWITCH_PORT_SDS(4, 5, 1, qsgmii)
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+ SWITCH_PORT_SDS(5, 6, 1, qsgmii)
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+ SWITCH_PORT_SDS(6, 7, 1, qsgmii)
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+ SWITCH_PORT_SDS(7, 8, 1, qsgmii)
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+
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+ SWITCH_PORT_SDS(48, 9, 12, qsgmii)
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+ SWITCH_PORT_SDS(49, 10, 12, qsgmii)
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+ SWITCH_PORT_SDS(50, 11, 12, qsgmii)
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+ SWITCH_PORT_SDS(51, 12, 12, qsgmii)
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+
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+ port@52 {
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+ ethernet = <ðernet0>;
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+ reg = <52>;
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+ phy-mode = "internal";
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+
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+ fixed-link {
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+ speed = <1000>;
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+ full-duplex;
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+ };
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+ };
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+ };
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+};
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+
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+&uart1 {
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+ status = "okay";
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+};
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